JPH036860U - - Google Patents
Info
- Publication number
- JPH036860U JPH036860U JP1990013354U JP1335490U JPH036860U JP H036860 U JPH036860 U JP H036860U JP 1990013354 U JP1990013354 U JP 1990013354U JP 1335490 U JP1335490 U JP 1335490U JP H036860 U JPH036860 U JP H036860U
- Authority
- JP
- Japan
- Prior art keywords
- line pattern
- pattern
- substrate
- insulating layer
- power line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000037431 insertion Effects 0.000 claims description 2
- 238000003780 insertion Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Description
第1図A,Bはこの考案の実施例のプリント配
線基板の断面図を示し、第2図は同実施例の配線
基板の効果を説明するための図である。また第3
図A,Bは従来のプリント配線基板の断面図を示
している。
1……基板、2……回路パターン、3……アン
ダーコート層、4……導電ペースト層、5……オ
ーバーコート層、7……スルーホール(ICピン
挿入孔)。
FIGS. 1A and 1B show cross-sectional views of a printed wiring board according to an embodiment of this invention, and FIG. 2 is a diagram for explaining the effects of the wiring board according to the same embodiment. Also the third
Figures A and B show cross-sectional views of conventional printed wiring boards. DESCRIPTION OF SYMBOLS 1... Board, 2... Circuit pattern, 3... Undercoat layer, 4... Conductive paste layer, 5... Overcoat layer, 7... Through hole (IC pin insertion hole).
Claims (1)
インパターンおよび/または電源ラインパターン
並びに信号ラインパターンを含む回路パターンと
、前記回路パターンを形成した基板上に、前記グ
ラウンドラインパターンまたは電源ラインパター
ンのうち何れか一方の少なくとも一部を除いて前
記回路パターンを被うように形成された絶縁層と
、前記絶縁層上に前記グラウンドラインパターン
または電源ラインパターンの絶縁されていない部
分と接続されるように形成された導電層と、を備
えたプリント配線基板において、 ICピン挿入孔間に、ICピンランドに接触し
ない範囲で前記導電層の一部が形成されているこ
とを特徴とするプリント配線基板。[Claims for Utility Model Registration] A substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and the ground line pattern formed on the substrate on which the circuit pattern is formed. an insulating layer formed to cover the circuit pattern except for at least a part of either the pattern or the power line pattern; and an insulating layer on the insulating layer where the ground line pattern or the power line pattern is not insulated. a conductive layer formed to be connected to the IC pin land, a part of the conductive layer is formed between the IC pin insertion holes in a range that does not contact the IC pin land. printed wiring board.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1-19219 | 1989-02-21 | ||
JP1921989 | 1989-02-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH036860U true JPH036860U (en) | 1991-01-23 |
JP2517757Y2 JP2517757Y2 (en) | 1996-11-20 |
Family
ID=31717258
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990013354U Expired - Lifetime JP2517757Y2 (en) | 1989-02-21 | 1990-02-14 | Printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2517757Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5622002U (en) * | 1979-07-30 | 1981-02-27 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4920751A (en) * | 1972-06-19 | 1974-02-23 |
-
1990
- 1990-02-14 JP JP1990013354U patent/JP2517757Y2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4920751A (en) * | 1972-06-19 | 1974-02-23 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5622002U (en) * | 1979-07-30 | 1981-02-27 |
Also Published As
Publication number | Publication date |
---|---|
JP2517757Y2 (en) | 1996-11-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |