JPH036861U - - Google Patents

Info

Publication number
JPH036861U
JPH036861U JP1335590U JP1335590U JPH036861U JP H036861 U JPH036861 U JP H036861U JP 1335590 U JP1335590 U JP 1335590U JP 1335590 U JP1335590 U JP 1335590U JP H036861 U JPH036861 U JP H036861U
Authority
JP
Japan
Prior art keywords
line pattern
pattern
substrate
insulating layer
power line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1335590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1335590U priority Critical patent/JPH036861U/ja
Publication of JPH036861U publication Critical patent/JPH036861U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図Aはこの考案の実施例のプリント配線基
板の断面図を示し、同図B,C,Dは信号ライン
パターンの曲折部の例を示す図である。また、第
2図は本実施例のプリント配線基板の効果を説明
するための図である。 1……基板、2……信号パターン、3……グラ
ウンドパターン、4……絶縁層(アンダーコート
層)、5……導電ペースト層、6……絶縁層(オ
ーバーコート層)、B……曲折部。
FIG. 1A shows a sectional view of a printed wiring board according to an embodiment of this invention, and FIGS. 1B, C, and D show examples of bent portions of a signal line pattern. Moreover, FIG. 2 is a diagram for explaining the effect of the printed wiring board of this embodiment. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Signal pattern, 3...Ground pattern, 4...Insulating layer (undercoat layer), 5...Conductive paste layer, 6...Insulating layer (overcoat layer), B...Bending Department.

Claims (1)

【実用新案登録請求の範囲】 (1) 基板と、前記基板上に形成されたグラウン
ドラインパターンおよび/または電源ラインパタ
ーン並びに信号ラインパターンを含む回路パター
ンと、前記回路パターンを形成した基板上に前記
グラウンドラインパターンまたは電源ラインパタ
ーンのうち何れか一方の少なくとも一部を除いて
前記回路パターンを被うように形成された絶縁層
と、前記絶縁層上に前記グラウンドラインパター
ンまたは電源ラインパターンの絶縁されていない
部分と接続されるように形成された導電層と、を
備えたプリント配線基板において、 前記信号ラインパターンの曲折部の内角が略1
35度以上に設定されていることを特徴とするプ
リント配線基板。 (2) 基板と、前記基板上に形成されたグラウン
ドラインパターンおよび/または電源ラインパタ
ーン並びに信号ラインパターンを含む回路パター
ンと、前記回路パターンを形成した基板上に前記
グラウンドラインパターンまたは電源ラインパタ
ーンのうち何れか一方の少なくとも一部を除いて
前記回路パターンを被うように形成された絶縁層
と、前記絶縁層上に前記グラウンドラインパター
ンまたは電源ラインパターンの絶縁されていない
部分と接続されるように形成された導電層と、を
備えたプリント配線基板において、 前記信号ラインパターンの曲折部が円弧状に設
定されていることを特徴とするプリント配線基板
[Claims for Utility Model Registration] (1) A substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and a circuit pattern formed on the substrate on which the circuit pattern is formed. an insulating layer formed to cover the circuit pattern except for at least a part of either the ground line pattern or the power line pattern; and an insulating layer of the ground line pattern or the power line pattern on the insulating layer. and a conductive layer formed to be connected to a portion that is not connected to the signal line pattern, wherein the internal angle of the bent portion of the signal line pattern is approximately 1.
A printed wiring board characterized by being set at 35 degrees or more. (2) A substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and a circuit pattern including the ground line pattern or the power line pattern formed on the substrate on which the circuit pattern is formed. an insulating layer formed to cover the circuit pattern except for at least a part of one of them; and an insulating layer formed on the insulating layer to be connected to an uninsulated portion of the ground line pattern or the power line pattern. and a conductive layer formed on the printed wiring board, wherein the bent portion of the signal line pattern is set in an arc shape.
JP1335590U 1989-02-21 1990-02-14 Pending JPH036861U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1335590U JPH036861U (en) 1989-02-21 1990-02-14

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1922089 1989-02-21
JP1335590U JPH036861U (en) 1989-02-21 1990-02-14

Publications (1)

Publication Number Publication Date
JPH036861U true JPH036861U (en) 1991-01-23

Family

ID=31717259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1335590U Pending JPH036861U (en) 1989-02-21 1990-02-14

Country Status (1)

Country Link
JP (1) JPH036861U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008098507A (en) * 2006-10-13 2008-04-24 Denso Corp Resin substrate and ultrasonic sensor using resin substrate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530822A (en) * 1978-08-25 1980-03-04 Fujitsu Ltd Printed board
JPS6132644A (en) * 1984-07-25 1986-02-15 Hitachi Ltd Talkie supply system
JPS62190727A (en) * 1986-02-17 1987-08-20 Fujitsu Ltd Treatment of semiconductor wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530822A (en) * 1978-08-25 1980-03-04 Fujitsu Ltd Printed board
JPS6132644A (en) * 1984-07-25 1986-02-15 Hitachi Ltd Talkie supply system
JPS62190727A (en) * 1986-02-17 1987-08-20 Fujitsu Ltd Treatment of semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008098507A (en) * 2006-10-13 2008-04-24 Denso Corp Resin substrate and ultrasonic sensor using resin substrate

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