JP2517757Y2 - Printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a printed wiring board used in electronic equipment, and more particularly to electromagnetic interference (EM).
The present invention relates to a printed wiring board that has taken measures I).

(B) Conventional Technology In recent years, with the development of electronic devices, the speed and density of circuits formed on printed wiring boards have been accelerated, but with this, regulations on EMI have become stricter. ing. A typical method among the EMI countermeasures that has been considered in the past is to reduce the radiation noise and the ingress noise by using a housing that houses the board as a shield case. However, this method has a problem that the electromagnetic wave energy trapped in the shield case is radiated to the outside through the cable, and this method basically reduces the electromagnetic wave energy generated based on the high frequency characteristics of the circuit. Therefore, it is almost impossible to suppress the radiation noise completely. So a new EMI
A printed wiring board for countermeasures has been proposed. This printed wiring board is provided on a substrate on which circuit patterns such as a signal line pattern (hereinafter simply referred to as a signal pattern), a ground line pattern (hereinafter simply referred to as a ground pattern) and a power supply line pattern (hereinafter simply referred to as a power supply pattern) are formed. , An insulating layer is formed except at least a part of the ground pattern (hereinafter, this insulating layer is referred to as an undercoat layer), and a conductive paste layer or the like is formed on the insulating layer so as to be connected to the non-insulated portion of the ground pattern. A conductive layer is formed. Further, usually, an insulating layer (hereinafter, this insulating layer is referred to as an overcoat layer) is further formed on this conductive layer.

In the printed wiring board having such a configuration, the radiation noise can be reduced mainly for four reasons.

The first is to reduce the impedance of the ground pattern by the conductive layer.

The second is removal of high frequency components from the signal pattern and the power supply pattern by the conductive layers that are close to each other. That is, the undercoat layer is formed by a so-called solder register, but since this film thickness is as thin as about 20 to 40 μm, the signal pattern and the power source for the conductive layer formed on the undercoat layer and connected to the ground pattern are formed. The distributed capacitance of the pattern becomes large. Therefore, unnecessary high frequency components generated by ringing or the like are grounded to the ground pattern in high frequency, and the radiation noise is suppressed.

Thirdly, the impedance of the signal pattern and the power supply pattern is made uniform by the conductive layer. That is, since the signal pattern and the power supply pattern are covered by the conductive layer,
The distance between these circuit patterns and the conductive layer connected to the ground pattern is made uniform, and the impedance of each circuit pattern is also made uniform. As a result, the generation of the impedance mismatching portion on the high frequency transmission and the generation of unnecessary high frequency components due to the impedance mismatching portion are suppressed.

Yet another reason is the shielding effect by the conductive layer itself.

Radiation noise is effective due to the above four reasons, namely, lowering the impedance of the ground pattern by the conductive layer, removal of high frequency components by the conductive layer in close proximity, uniform impedance of the circuit pattern, and normal shielding effect of the conductive layer itself. Can be suppressed.

(C) Problems to be Solved by the Invention However, in the conventional wiring board in which the conductive layer is formed on the undercoat layer, as shown in FIGS. Conductive layer 4 only on the peripheral portion 9
Therefore, the effect of the conductive layer could not be sufficiently obtained.

Therefore, an object of the present invention is to provide a printed wiring board which can solve the above problems by forming a conductive layer portion between adjacent IC pin insertion holes.

(D) Means for Solving the Problems The present invention provides a substrate, a circuit pattern including a ground line pattern and / or a power supply line pattern and a signal line pattern formed on the substrate, and a substrate on which the circuit pattern is formed. An insulating layer formed to cover the circuit pattern except at least a part of one of the ground line pattern and the power line pattern, and the ground line pattern or the power line on the insulating layer. In a printed wiring board provided with a conductive layer formed so as to be connected to a non-insulated portion of the pattern, one of the conductive layers is also provided between adjacent IC pin insertion holes in a range not contacting the IC pin land. It is characterized in that a portion is formed.

(E) Function In this invention, since a part of the conductive layer is formed between the adjacent IC pin insertion holes so as not to contact the IC pin land, unnecessary high frequency components generated in this part can be reduced. Radiation noise is suppressed.

(F) Embodiment FIGS. 1A and 1B are sectional views showing the periphery of an IC mounting portion of a wiring board according to an embodiment of the present invention. The same figure (A),
(B) is a YY 'cross section arrow view, and XX' cross section arrow view, respectively.

First, a circuit pattern 2 is formed on the surface of a substrate 1 made of an insulating material such as epoxy resin, phenol resin, glass fiber or ceramics, as shown in the figure. The circuit pattern 2 includes a signal pattern, a ground pattern, a power supply pattern and a through hole copper foil portion. These patterns are formed by a known photolithography technique. After forming a necessary pattern, an undercoat layer 3 is formed by leaving a part of a ground pattern (not shown) and a through hole 7 land portion (IC pin land portion) 2a which is an IC pin insertion hole. The undercoat layer 3 is a solder resist layer made of a resin insulating material, and can be easily formed by screen printing. When the undercoat layer 3 is formed, the IC is formed on it.
The conductive paste layer 4 similar to the peripheral portion 9 is also formed on the immediately lower portion 8 by screen printing so as to be continuous with each other.
The mask portion at that time is the IC pin land portion 2a, and a gap is formed between the adjacent IC pin land portion 2a.
Then, the conductive paste layer 4 is cured by heating, and an overcoat layer 5 made of an insulating resin material is further formed on the conductive paste layer 4 over the entire upper surface of the substrate 1 leaving the land portion 2a of the IC pin. The overcoat layer 5 can be made of exactly the same material as the undercoat layer 3, and can be easily formed by a printing process together with the conductive paste layer 4 and the undercoat layer 3.

In the above structure, as shown in FIG. 1 (B), the conductive paste layer 4 is formed between adjacent IC pin insertion holes in a range where it does not come into contact with the IC pin land portion 2a. Unnecessary high frequency components can be reduced and radiation noise can be suppressed.

In this embodiment, the conductive paste layer 4 is made of copper paste, and the material of this copper paste can be, for example, one having the following composition, but the material is not limited to this.

That is, basically copper fine particles as a filler,
It is made by mixing a binder for firmly adhering these fine particles to each other, and various additives for keeping the conductivity stable for a long period of time. Specifically, the following formulations are preferable.

(Compounding Example 1) (A) 100 parts by weight of metallic copper powder, (B) 5 to 30 parts by weight of resol type phenol resin, (C) 0.1 to 2 parts by weight of dispersant, and 0.5 to 4 parts by weight of chelate forming agent. And (D) 0.1 to 5 parts by weight of the adhesion improver and (E) 0.5 to 7 parts by weight of the conductivity improver.

The metallic copper powder may have any shape such as flaky shape, dendritic shape, spherical shape, and irregular shape, and the particle size thereof is preferably 100 μm or less, particularly preferably 1 to 30 μm.

The resol type phenol resin is for binding the metallic copper powder and other components well, and effectively acts to maintain the conductivity for a long time.

The dispersant is preferably a fatty acid or a metal salt of a fatty acid. Among saturated fatty acids, palmitic acid having 16 to 20 carbon atoms, stearic acid, arachidic acid and the like are preferable, and as unsaturated fatty acids, zomarinic acid having 16 to 18 carbon atoms, oleic acid and linolenic acid are preferable. As the metal salt of a fatty acid, a salt of the above fatty acid with a metal such as sodium, potassium, copper, zinc or aluminum is preferable.

These dispersants promote fine dispersion of the metallic copper powder in the resin mixture.

As the chelating agent, it is preferable to use at least one selected from aliphatic amines such as monoethanolamine, diethanolamine, triethanolamine, ethylenediamine, triethylenediamine, and triethylenetetramine. The chelating agent prevents the metal copper powder from oxidizing and contributes to the maintenance of conductivity.

 The adhesiveness improver includes various adhesives.

Natural resins include rosin (gum, tall oil, wood), rosin dielectric, terpene resin,
(Terpene type, terpene phenol type) and the like are preferable.
Synthetic resin-based materials include thermosetting materials such as petroleum resin-based, butyral resin-based, phenol resin-based, and xylene resin-based materials, thermoplastic materials such as vinyl acetate resin, acrylic resin, cellulose, phenoxy resin, and recycled materials. Rubber,
Synthetic rubbers such as styrene butadiene rubber, nitrile rubber and butyl rubber are preferred. These have a property of lowering the internal stress of the resol-type phenol resin as a binder, or have a functional group (carboxyl group, hydroxyl group, long-chain alkyl group, etc.) that exhibits adhesiveness.

The conductivity enhancer is preferably a nitrogen-containing compound having a phenyl group or a heterocyclic compound, particularly a compound capable of exhibiting conductivity by chemical oxidative polymerization or electrolytic polymerization.

This formulation example is described in detail in Japanese Patent Application No. 1-308782.

(Formulation Example 2) (A) 100 parts by weight of metallic copper powder, and (B) melamine resin 35
To 50% by weight, 20 to 35% by weight of a polyester resin and 15 to 30% by weight of a resol type phenolic resin, 10 to 25 parts by weight of a resin mixture, and 0.1 to 2 parts by weight of a (C) dispersant,
(D) A chelating agent is added in an amount of 0.5 to 4 parts by weight.

In the above, preferable specific examples of the metal copper powder, the dispersant and the chelate forming agent and their functions are the same as those in the above-mentioned formulation example 1.

The melamine resin in the resin mixture is an alkylated melamine resin, and at least one selected from methylated melamine or butylated melamine resin is used.

The polyester-based resin in the resin mixture is a resin produced by polycondensation of a polyhydric alcohol and a polybasic acid,
Examples thereof include alkyd resins, maleic acid resins and unsaturated polyester resins.

Melamine resin 35-50% by weight, polyester resin 20-35% by weight, resol type phenol resin 15-
By containing 30% by weight, it is possible to obtain a conductive paint that binds metal copper powder and other components well, maintains a long-term conductive system, has good adhesion to copper foil, and good solder heat resistance. To be

This formulation example is described in detail in Japanese Patent Application No. 62-328095.

In this embodiment, as shown in FIG. 1, the undercoat layer 3, the conductive paste layer 4, and the overcoat 5 can all be easily formed by the conventional screen printing process. In other words, EMI without complicated process
It is possible to easily obtain a substrate for which measures have been taken. Also,
Since the conductive paste layer is formed between adjacent IC pin insertion holes, that is, between through holes,
Unnecessary high frequency components generated in this portion can be reduced, and radiation noise can be suppressed. In particular, for an IC pin in which a clock or a pulse signal is constantly flowing, the configuration of this embodiment is very effective from the viewpoint of reducing high frequency noise. FIG. 2 is a graph in which the abscissa represents the treatment% between the IC pins of the substrate, that is, the% in which the conductive paste layer is formed between all the IC pins, and the ordinate represents the radiation noise reducing effect. As is clear from the figure, the effect of radiation noise attenuation becomes extremely clear when the number of processing between IC pins is increased. Therefore, the more the treatment between IC pins, the better. However, even if a conductive paste layer is formed in a quarter, it has a reduction effect of about 60 dB. It will be clear that it is included in.

Although not shown in FIG. 1, it is better to form the undercoat layer 3, the conductive paste layer 4, and the overcoat layer 5 in this order also on the back surface of the substrate. Furthermore, in the above-described embodiment, the connection pattern of the conductive paste layer 4 is the ground pattern, but the same effect can be obtained even if the connection point of the conductive paste layer 4 is a power supply pattern.

(G) Effect of the Invention According to this invention, since a part of the conductive layer is formed between the adjacent IC pin insertion holes, unnecessary high frequency components generated from that part, that is, radiation noise is suppressed. can do. Especially, in the printed wiring board, radiation noise is apt to be generated from this part because the clock and pulse signals always flow to the IC pin, but the radiation noise suppression is the most effective by adopting the configuration of the present invention. Become.
Moreover, the manufacturing process may be a normal screen printing process,
Since the arrangement pattern of the conductive layer is simply changed, the manufacturing cost is not increased.

[Brief description of drawings]

1 (A) and 1 (B) are sectional views of a printed wiring board according to an embodiment of the present invention, and FIG. 2 is a view for explaining the effect of the wiring board of the embodiment. Also, FIG. 3 (A),
(B) shows a sectional view of a conventional printed wiring board. 1 ... Substrate, 2 ... Circuit pattern, 3 ... Undercoat layer, 4 ... Conductive paste layer, 5 ... Overcoat layer, 7 ... Through hole (IC pin insertion hole).

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Tsunehiko Terada 2-1 2-3 Iwata-cho, Higashi-Osaka City, Osaka Prefecture Tatsuta Electric Wire Co., Ltd. (72) Shohei Morimoto 2-3-3 Iwata-cho, Higashi-Osaka City, Osaka No. 1 within Tatsuta Electric Cable Co., Ltd. (56) References: Actually developed, Sho 50-111660 (JP, U)

Claims (1)

(57) [Scope of utility model registration request] 1. A substrate, a circuit pattern including a ground line pattern and / or a power supply line pattern and a signal line pattern formed on the substrate, and the ground line pattern or the power supply on the substrate on which the circuit pattern is formed. An insulating layer formed so as to cover the circuit pattern except at least a part of any one of the line patterns, and a non-insulated portion of the ground line pattern or the power line pattern on the insulating layer. In a printed wiring board having a conductive layer formed as described above, a part of the conductive layer is formed between adjacent IC pin insertion holes as long as it does not contact the IC pin land. And a printed wiring board.