JP2795715B2 - Printed wiring board - Google Patents

Description

Description: BACKGROUND OF THE INVENTION (a) Field of Industrial Application The present invention relates to a printed wiring board used for electronic equipment, and more specifically, to electromagnetic interference (EM).
The present invention relates to a printed wiring board on which the measure (I) has been taken.

(B) Conventional technology In recent years, the development of electronic devices has promoted the increase in the speed and density of circuits formed on printed wiring boards, but this has led to strict regulations on EMI. ing. A typical method of EMI measures conventionally considered is a method of reducing radiation noise and ingress noise by using a housing for housing a board as a shield case. However, this method has a problem that the electromagnetic wave energy confined in the shield case is radiated to the outside through a cable, and this method basically reduces the electromagnetic wave energy generated based on the high frequency characteristics of the circuit. Therefore, it is almost impossible to completely suppress radiation noise. So, a new EM
Printed wiring boards for I measures have been proposed. This wiring board is formed on a substrate on which circuit patterns such as a signal line pattern (hereinafter simply referred to as a signal pattern), a ground line pattern (hereinafter simply referred to as a ground pattern) and a power supply line pattern (hereinafter simply referred to as a power supply pattern) are formed. An insulating layer is formed except at least a part of the ground pattern (hereinafter, this insulating layer is referred to as an undercoat layer), and a conductive layer for shielding is formed thereon so as to be connected to a non-insulated portion of the ground pattern. It is formed. Usually, an insulating layer (hereinafter, this insulating layer is referred to as an overcoat layer) is further formed on the conductive layer for shielding.

In the printed wiring board having such a configuration, radiation noise can be reduced mainly for four reasons.

First, the impedance of the ground pattern is reduced by the conductive layer.

Second is the removal of high frequency components from the signal pattern and the power supply pattern by the close conductive layer. That is, although the undercoat layer is formed of a so-called solder resist, the thickness of the undercoat layer is as thin as about 20 to 40 μm, and thus the signal pattern and the power supply for the conductive layer formed thereon and connected to the ground pattern are formed. The distributed capacitance of the pattern increases. Therefore, unnecessary high-frequency components generated by ringing or the like are grounded at a high frequency to the ground pattern, thereby suppressing radiation noise.

Third, the impedance of the signal pattern and the power supply pattern is made uniform by the conductive layer. That is, the signal pattern and the power supply pattern are covered by the conductive layer.
The distance between these circuit patterns and the conductive layer connected to the ground pattern is made uniform, and the impedance of each circuit pattern is also made uniform. As a result, generation of an impedance mismatching part in high-frequency transmission and generation of unnecessary high-frequency components due to the generation are suppressed.

Yet another reason is the shielding effect of the conductive layer itself.

Efficient radiation noise by the above four reasons: low impedance of ground pattern by conductive layer, removal of high frequency component by close conductive layer, uniformity of impedance of circuit pattern, and normal shielding effect by conductive layer itself. Can be suppressed.

(C) Problems to be Solved by the Invention Generally, in an electronic circuit board, a bypass capacitor for bypassing high-frequency noise is attached to a connector portion, a power supply terminal, and a ground terminal portion which are arranged at an end of the board. Although this bypass capacitor has a relatively small capacity because of its function of bypassing unnecessary high-frequency components, in a conventional printed wiring board, this bypass capacitor is mounted on the board as a discrete component. For this reason, a soldering operation for mounting the capacitor on the substrate is required, and there is a drawback that the miniaturization of the substrate is hindered. Further, there is a problem that the lead wire of the bypass capacitor acts as an inductance component with respect to a high frequency, and as a result, as will be described later, the frequency characteristic of the impedance deteriorates.

An object of the present invention is to provide a printed wiring board in which the above-mentioned bypass capacitor is formed by using a conductive layer.

(D) Means for Solving the Problems The invention according to claim 1 includes a substrate, a circuit pattern including a ground line pattern and a signal line pattern formed on the substrate, and a substrate on which the circuit pattern is formed. An insulating layer formed so as to cover the circuit pattern except at least a part of the ground line pattern, and formed on the insulating layer so as to be connected to a non-insulated portion of the ground line pattern. A printed circuit board comprising: a connector land or a power supply terminal land, wherein the insulating layer and the conductive layer are provided at an end of the board, and extend to a connector land or a power terminal land to which a connector is connected; A bypass capacitor is formed by the terminal land and the conductive layer located above the terminal land.

The invention according to claim 2 is a substrate, a circuit pattern including a power supply line pattern and a signal line pattern formed on the substrate, and at least a part of the power supply line pattern on the substrate on which the circuit pattern is formed. An insulating layer formed so as to cover the circuit pattern except for a conductive layer formed on the insulating layer so as to be connected to a non-insulated portion of the power supply line pattern,
Wherein the insulating layer and the conductive layer are provided at an end of the board, extend to a connector land or a ground terminal land to which a connector is connected, and the connector land or the ground terminal land and above And forming a bypass capacitor with the conductive layer portion located at the position (1).

(E) Function In the present invention, since the conductive layer exists above the connector land, a capacitor is formed by the conductive layer and the connector land with the insulating layer interposed therebetween. This capacitor functions as a bypass capacitor (hereinafter, referred to as a bypass capacitor). Alternatively, when a conductive layer exists above the power terminal land, a decap is formed by the power terminal land and the conductive layer portion above the power terminal land. On the other hand, it reduces the impedance of the circuit to unnecessary high frequency components,
From the standpoint of the effect of suppressing radiation noise due to the uniformization, it can be considered that the same is true whether the conductive layer is connected to a ground pattern or a power supply pattern. Therefore, when the connection between the ground pattern and the conductive layer is difficult due to the layout, and the connection with the power supply pattern is rather easy, the conductive layer is connected to the power supply pattern, and the conductive layer and the connector land are connected at the connector portion. Form decaps. Alternatively, a decap is formed by the ground terminal land and the conductive layer.

(F) Embodiment FIG. 1 shows a printed wiring board according to an embodiment of the present invention. FIG. 1 (A) is a vertical sectional view along line XX ', and FIG. 1 (B) is a plan view. First, a circuit pattern is formed on the surface of the substrate 1 made of an insulating material such as an epoxy resin, a phenol resin, a glass fiber, and a ceramic as shown in the figure. The circuit pattern includes a signal pattern 2, a ground pattern 3, and a power supply pattern (not shown). In this embodiment, in addition to this circuit pattern, a connector land 4 to which a connector is connected is formed on an end portion of the substrate 1 at the same time as the circuit pattern in a wider area than a normal connector land 4a. Each of these patterns is formed by a known photolithography technique. After forming a necessary pattern, the undercoat layer 5 is formed while leaving a part of the region A of the ground pattern 3. The undercoat layer 5 is a solder resist layer made of a resin insulating material. The area A where the ground pattern 5 is exposed is desirably formed at a plurality of locations on the substrate, but it is sufficient that at least one location is provided. The undercoat layer 5 is formed by screen printing so as to cover above the connector land 4 together with the circuit pattern. When the undercoat layer 5 is formed, a conductive layer 6 for shielding is applied thereon.
The conductive layer 6 is also printed on the undercoat layer 5 so as to cover the connector lands 4 together with the circuit pattern. In the present embodiment, the conductive layer 6 is made of a copper paste and made of a material having the following composition, but is not limited to this.

That is, it is basically made by mixing copper fine particles as a filler, a binder for firmly adhering these fine particles to each other, and various additives for maintaining conductivity for a long period of time. Specifically, the following composition is preferable.

(Formulation Example 1) (A) 100 parts by weight of metallic copper powder, (B) 5 to 30 parts by weight of a resole type phenol resin, (C) 0.1 to 2 parts by weight of a dispersant, and 0.5 to 4 parts by weight of a chelating agent. And (D) 0.1 to 5 parts by weight of an adhesion improver, and (E) 0.5 to 7 parts by weight of a conductivity improver.

The metallic copper powder may be in any shape such as a flake, a dendrite, a sphere, and an irregular shape.

The resole type phenol resin is for binding metal copper powder and other components well, and effectively acts for maintaining long-term conductivity.

As the dispersant, fatty acids or metal salts of fatty acids are preferred. Preferred are saturated fatty acids such as palmitic acid, stearic acid and arachiic acid having 16 to 20 carbon atoms, and preferred unsaturated fatty acids are 16 to 18 carbon atoms such as somalic acid, oleic acid and linolenic acid. As the metal salt of a fatty acid, a salt of the above-mentioned fatty acid with a metal such as sodium, potassium, copper, zinc, and aluminum is preferable.

These dispersants promote fine dispersion of the copper metal powder in the resin mixture.

As the chelate forming agent, it is preferable to use at least one selected from aliphatic amines such as monoethanolamine, diethanolamine, triethanolamine, ethylenediamine, triethylenediamine, and triethylenetetramine. The chelating agent prevents oxidation of the metallic copper powder and contributes to maintaining conductivity.

 Various adhesives are included as the adhesion improver.

As the natural resin type, rosin (gum type, tall oil type, wood type), rosin dielectric, terpene resin type,
(Terpene type, terpene phenol type) and the like are preferable.
As synthetic resin type, thermosetting type such as petroleum resin type, butyral resin type, phenol resin type, xylene resin type, thermoplastic type such as vinyl acetate resin, acrylic resin, cellulose, phenoxy resin, etc. Rubber,
Synthetic rubbers such as styrene butadiene rubber, nitrile rubber, butyl rubber and the like are preferred. These are those having the property of lowering the internal stress of the resol type phenol resin as a binder, or those having a functional group (a carboxyl group, a hydroxyl group, a long-chain alkyl group, etc.) exhibiting adhesiveness.

As the conductivity improver, a compound composed of a nitrogen-containing compound or a heterocyclic compound having a phenyl group, particularly a compound capable of exhibiting conductivity by chemical oxidation polymerization or electrolytic polymerization is preferable.

In addition, this composition example is illustrated in detail in Japanese Patent Application No. 1-340782.

(Formulation Example 2) (A) 100 parts by weight of metallic copper powder and (B) melamine resin 35
10 to 25 parts by weight of a resin admixture comprising 50 to 50% by weight, 20 to 35% by weight of a polyester resin and 15 to 30% by weight of a resol type phenol resin, and (C) 0.1 to 2 parts by weight of a dispersant.
(D) It is formed by mixing 0.5 to 4 parts by weight of a chelating agent.

Preferred specific examples of the metal copper powder, the dispersant, and the chelating agent in the above description and the functions thereof are the same as those in the above-mentioned formulation example 1.

The melamine resin in the resin mixture is an alkylated melamine resin and uses at least one selected from a methylated melamine or a butylated melamine resin.

The polyester resin in the resin admixture is a resin formed by polycondensation of a polyhydric alcohol and a polybasic acid,
An alkyd resin, a maleic acid resin, an unsaturated polyester resin and the like can be mentioned.

Resin admixture of melamine resin 35-50% by weight, polyester resin 20-35% by weight, resole phenolic resin 15-
By using 30% by weight, it is possible to obtain a conductive paint that binds metallic copper powder and other components well, maintains long-term conductivity, has good adhesion to copper foil, and has good soldering heat resistance. Can be

It should be noted that this composition example is described in detail in Japanese Patent Application No. 62-328095.

After the conductive layer 6 is applied, it is cured by heating, and an overcoat layer 7 made of an insulating resin material is formed on the entire upper surface of the conductive layer 6. The overcoat layer 7 can be made of exactly the same material as the undercoat layer 5, and is easily formed together with the conductive layer 6 and the undercoat layer 5 by a printing process.

In the above configuration, the region B where the connector land 4 and the conductive layer 6 located above the connector land 4 overlap constitutes a capacitor with the undercoat layer 5 interposed therebetween. Since the thickness of the undercoat layer 5 is at most 20 to 40 μm,
In the region B, a sufficient capacitance required for the decap can be obtained with an appropriate area. Therefore, by forming a capacitor portion such as a region B as shown in FIG. 1 for all connector lands to which each signal pattern is connected,
Necessary decaps can be formed without soldering and connecting decaps as discrete components.

As described above, when the decaps are formed by the connector lands and the conductive layers and the case where the bypass capacitor is used as a discrete component as in the related art is compared with the actual example, the following differences are obtained.

First, when a decap is used as a discrete component as in the prior art, assuming that the two lead wires of the decap are both a metal wire having a length of 5 mm and a diameter of 0.6 mm, the inductance L of the lead wire is calculated by equation (1). it can.

Here, μ; permeability of metal wire (= 4π × 10 ⁻⁷ [H / m]) l; length of lead wire (= 5 × 10 ⁻³ [m]) r; radius of lead wire (= 0.3 × 10 ^-3 [m]) That is, the inductance per lead wire is Now, the capacitance (C) of the bypass capacitor itself is 330 × 10
^-12 [F], the series impedance Z composed of the inductance of the two lead wires is calculated from equation (2).

However, f; frequency [Hz] Now, when we find the impedance at f = 100 MHz, Next, when a decap is formed by the connector land and the conductive layer, only the capacitance needs to be considered, and the impedance Z is calculated from the equation (3).

Where ε ₀ ; vacuum permittivity (8.854 * 10 ^-12 [F / m]) ε _r ; relative permittivity of undercoat layer S; facing area of connector land dielectric layer [m ² ] d; undercoat layer Now, assuming that ε _r = 5, S = 2 cm ² , d = 30 μm, Similarly, the frequency characteristics of the impedance from 10 MHz to 1000 MHz are calculated for both, and plotted on a log-log graph as shown in FIG.

In FIG. 3, the horizontal axis represents frequency (MHz) and the vertical axis represents impedance (Ω). | Z _A | represents frequency characteristics of the conventional example, and | Z _B |

| Z _AC | and | Z _AL | indicate the frequency characteristics of the absolute value of the impedance due to the capacitance of the decap body and the inductance of the lead wire, respectively, of the conventional example.

As apparent from FIG. 3, the impedance is increased due to the inductance of the lead as the frequency increases in the conventional example, since it is added, so that an increase in the overall impedance Z _A also 100 MHz _Z or more.

On the other hand, since the decap of the embodiment has no inductance component, the impedance decreases as the frequency increases, so that it is extremely effective as a decap.

In the example shown in FIG. 1, the decoupling between the connector land 4 and the conductive layer 6 is shown. However, since the power terminal land is formed at the end of the substrate 1, the power terminal land and the conductive layer 6 are formed. 6, it is of course possible to form a decap. Of course, it is also possible to enhance the effect by using a bypass capacitor as a discrete component.

Although the conductive layer 6 is connected to the ground pattern 3 in the embodiment shown in FIG. 1, the conductive layer 6 may be connected to a power supply pattern instead of the ground pattern 3. FIGS. 2A and 2B show this example. That is, when the undercoat layer 5 is formed by printing, a part of the power supply pattern 8 is left, and the conductive layer 6 is formed by printing, whereby the potential of the conductive layer 6 can be set to the power supply voltage. Then, in the region B, a decap is formed between the connector land 4 and the power supply. However, since the power supply impedance is almost negligible at high frequencies as described above, high-frequency noise (radiation noise) is suppressed. In terms of the effect, the same as the embodiment shown in FIG. 1 can be obtained. In the case of the embodiment shown in FIG.
A decap can be formed between the ground terminal land and the conductive layer 6.

As shown in FIGS. 1 and 2, the same effect can be obtained when the conductive layer 6 is connected to the ground pattern 3 or to the power supply pattern 8, so that the ground If there is a restriction on the power supply pattern or the power supply pattern, it is possible to select the one that is more advantageous in terms of suppressing high-frequency noise.

(G) Effects of the Invention According to the present invention, it is not necessary to separately mount a decap on the board by soldering or the like as in a conventional printed circuit board for EMI measures, so that the board can be miniaturized. Further, since no lead wire is required, there is no inductance component, and excellent frequency characteristics can be obtained as a bypass capacitor. Further, in the present invention, since only the insulating layer and the conductive layer are required to form the decaps, the number of printing steps does not need to be increased at all. That is, the workability is extremely good and the production cost is not increased.

[Brief description of the drawings]

1 and 2 show an embodiment of the present invention. FIG. 3 shows the frequency characteristics of impedance in the conventional example and the embodiment. 1 ... board, 2 ... signal pattern, 3 ... ground pattern, 4 ... connector land, 5 ... insulating layer (undercoat layer), 6 ... conductive layer, 7 ... insulating layer (overcoat layer) 8 Power pattern.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hisatoshi Murakami 2-3-1, Iwatacho, Higashiosaka-shi, Osaka Tatsuta Electric Wire Co., Ltd. (72) Inventor Tsunehiko Terada 2-3-3, Iwatacho, Higashiosaka-shi, Osaka No. 1 Inside of Tatsuta Electric Wire Co., Ltd. (72) Shohei Morimoto 2-3-1, Iwatacho, Higashi-Osaka City, Osaka Prefecture Inside of Tatsuta Electric Wire Co., Ltd. (56) References JP-A-63-4634 (JP, A) JP-A-63-4634 61-272958 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H05K 1/16

Claims (2)

(57) [Claims] A substrate, a circuit pattern including a ground line pattern and a signal line pattern formed on the substrate, and a circuit pattern formed on the substrate on which the circuit pattern is formed, except for at least a part of the ground line pattern. A printed wiring board comprising: an insulating layer formed so as to cover a circuit pattern; and a conductive layer formed on the insulating layer so as to be connected to a non-insulated portion of the ground line pattern. The insulating layer and the conductive layer are provided near an end of the substrate, and extend to a connector land or a power terminal land to which a connector is connected, and the connector land or the power terminal land and a conductive layer located thereabove. A printed wiring board characterized by forming a bypass capacitor with a layer portion. 2. A substrate, a circuit pattern including a power line pattern and a signal line pattern formed on the substrate, and a circuit pattern formed on the substrate on which the circuit pattern is formed, except for at least a part of the power line pattern. A printed wiring board comprising: an insulating layer formed so as to cover a circuit pattern; and a conductive layer formed on the insulating layer so as to be connected to a non-insulated portion of the power supply line pattern. The insulating layer and the conductive layer are provided near an end of the substrate, and extend to a connector land or a ground terminal land to which a connector is connected, and the connector land or the ground terminal land and a conductive land located thereabove. A printed wiring board characterized by forming a bypass capacitor with a layer portion.