JPS6156823B2 - - Google Patents

Info

Publication number
JPS6156823B2
JPS6156823B2 JP55126798A JP12679880A JPS6156823B2 JP S6156823 B2 JPS6156823 B2 JP S6156823B2 JP 55126798 A JP55126798 A JP 55126798A JP 12679880 A JP12679880 A JP 12679880A JP S6156823 B2 JPS6156823 B2 JP S6156823B2
Authority
JP
Japan
Prior art keywords
circuit
output
time
multiplication
real part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55126798A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5752959A (en
Inventor
Haruo Akagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55126798A priority Critical patent/JPS5752959A/ja
Publication of JPS5752959A publication Critical patent/JPS5752959A/ja
Publication of JPS6156823B2 publication Critical patent/JPS6156823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4806—Computations with complex numbers
    • G06F7/4812—Complex multiplication

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP55126798A 1980-09-11 1980-09-11 Multiplier Granted JPS5752959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55126798A JPS5752959A (en) 1980-09-11 1980-09-11 Multiplier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55126798A JPS5752959A (en) 1980-09-11 1980-09-11 Multiplier

Publications (2)

Publication Number Publication Date
JPS5752959A JPS5752959A (en) 1982-03-29
JPS6156823B2 true JPS6156823B2 (cs) 1986-12-04

Family

ID=14944207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55126798A Granted JPS5752959A (en) 1980-09-11 1980-09-11 Multiplier

Country Status (1)

Country Link
JP (1) JPS5752959A (cs)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223846A (ja) * 1982-06-23 1983-12-26 Fujitsu Ltd 複素数乗算器
WO1999000746A1 (fr) * 1997-06-26 1999-01-07 Asahi Kasei Kogyo Kabushiki Kaisha Unites arithmetiques paralleles et processeur de signaux numeriques utilisant lesdites unites
KR100433627B1 (ko) * 2001-12-11 2004-05-31 한국전자통신연구원 저전력 복소수 곱셈기
WO2021157172A1 (ja) * 2020-02-06 2021-08-12 三菱電機株式会社 複素乗算回路

Also Published As

Publication number Publication date
JPS5752959A (en) 1982-03-29

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