JPS6154674A - 超高周波集積回路装置 - Google Patents

超高周波集積回路装置

Info

Publication number
JPS6154674A
JPS6154674A JP59175861A JP17586184A JPS6154674A JP S6154674 A JPS6154674 A JP S6154674A JP 59175861 A JP59175861 A JP 59175861A JP 17586184 A JP17586184 A JP 17586184A JP S6154674 A JPS6154674 A JP S6154674A
Authority
JP
Japan
Prior art keywords
strip line
substrate
dielectric
integrated circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59175861A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0443416B2 (enrdf_load_stackoverflow
Inventor
Yasumi Hikosaka
康己 彦坂
Yasutaka Hirachi
康剛 平地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59175861A priority Critical patent/JPS6154674A/ja
Publication of JPS6154674A publication Critical patent/JPS6154674A/ja
Publication of JPH0443416B2 publication Critical patent/JPH0443416B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Waveguides (AREA)
JP59175861A 1984-08-25 1984-08-25 超高周波集積回路装置 Granted JPS6154674A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59175861A JPS6154674A (ja) 1984-08-25 1984-08-25 超高周波集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59175861A JPS6154674A (ja) 1984-08-25 1984-08-25 超高周波集積回路装置

Publications (2)

Publication Number Publication Date
JPS6154674A true JPS6154674A (ja) 1986-03-18
JPH0443416B2 JPH0443416B2 (enrdf_load_stackoverflow) 1992-07-16

Family

ID=16003479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59175861A Granted JPS6154674A (ja) 1984-08-25 1984-08-25 超高周波集積回路装置

Country Status (1)

Country Link
JP (1) JPS6154674A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02220491A (ja) * 1988-12-21 1990-09-03 American Teleph & Telegr Co <Att> 半導体光学デバイスのためのシリコンベース搭載構造
US6110568A (en) * 1991-02-07 2000-08-29 Fujitsu Limited Thin film circuit substrate and process for the manufacture thereof
JP2017126749A (ja) * 2016-01-15 2017-07-20 ソイテック 高抵抗率層を含む半導体構造を製作するための方法、および関連する半導体構造

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02220491A (ja) * 1988-12-21 1990-09-03 American Teleph & Telegr Co <Att> 半導体光学デバイスのためのシリコンベース搭載構造
US6110568A (en) * 1991-02-07 2000-08-29 Fujitsu Limited Thin film circuit substrate and process for the manufacture thereof
JP2017126749A (ja) * 2016-01-15 2017-07-20 ソイテック 高抵抗率層を含む半導体構造を製作するための方法、および関連する半導体構造
KR20170085981A (ko) * 2016-01-15 2017-07-25 소이텍 고 저항 층을 포함하는 반도체 구조들 및 관련된 반도체 구조들을 제조하기 위한 방법
JP2021168426A (ja) * 2016-01-15 2021-10-21 ソイテック 高抵抗率層を含む半導体構造を製作するための方法、および関連する半導体構造
EP3193361B1 (en) * 2016-01-15 2023-04-12 Soitec Method for fabricating semiconductor structures including a high resistivity layer, and related semiconductor structures

Also Published As

Publication number Publication date
JPH0443416B2 (enrdf_load_stackoverflow) 1992-07-16

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