JPS6153757A - 半導体集積回路装置 - Google Patents
半導体集積回路装置Info
- Publication number
- JPS6153757A JPS6153757A JP59174976A JP17497684A JPS6153757A JP S6153757 A JPS6153757 A JP S6153757A JP 59174976 A JP59174976 A JP 59174976A JP 17497684 A JP17497684 A JP 17497684A JP S6153757 A JPS6153757 A JP S6153757A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- output
- output buffer
- semiconductor integrated
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
Landscapes
- Power Sources (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59174976A JPS6153757A (ja) | 1984-08-24 | 1984-08-24 | 半導体集積回路装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59174976A JPS6153757A (ja) | 1984-08-24 | 1984-08-24 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6153757A true JPS6153757A (ja) | 1986-03-17 |
| JPH0434828B2 JPH0434828B2 (enExample) | 1992-06-09 |
Family
ID=15988033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59174976A Granted JPS6153757A (ja) | 1984-08-24 | 1984-08-24 | 半導体集積回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6153757A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04188866A (ja) * | 1990-11-22 | 1992-07-07 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JPH08174499A (ja) * | 1994-12-21 | 1996-07-09 | Sakae Denshi Kogyo Kk | 液体噴射加工装置 |
-
1984
- 1984-08-24 JP JP59174976A patent/JPS6153757A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04188866A (ja) * | 1990-11-22 | 1992-07-07 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JPH08174499A (ja) * | 1994-12-21 | 1996-07-09 | Sakae Denshi Kogyo Kk | 液体噴射加工装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0434828B2 (enExample) | 1992-06-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4495594A (en) | Synchronization of CRT controller chips | |
| JPS60227296A (ja) | 表示制御方式 | |
| JP3266119B2 (ja) | 液晶表示装置及び映像データ転送方法 | |
| EP0428293A2 (en) | Computer system | |
| US5329290A (en) | Monitor control circuit | |
| JPS5958538A (ja) | 文字図形表示装置 | |
| JPS6153757A (ja) | 半導体集積回路装置 | |
| US5303350A (en) | Circuit for initializing registers using two input signals for writing default value into D-latch after a reset operation | |
| US5309560A (en) | Data selection device | |
| JP3809242B2 (ja) | 画像データの転送装置 | |
| JP3482255B2 (ja) | 画像データ処理装置およびそれを用いた情報システム | |
| JP2530826B2 (ja) | 表示制御装置 | |
| JPS58136093A (ja) | 表示制御装置 | |
| JPS60135988A (ja) | 表示制御装置 | |
| JPS62229347A (ja) | 記憶回路アクセス装置 | |
| JP2856037B2 (ja) | メモリコントローラ | |
| JPS6125187A (ja) | Crt表示制御装置 | |
| JP2007183377A (ja) | 表示制御装置 | |
| JPH04290261A (ja) | 半導体回路のレイアウト方法 | |
| JPS60129786A (ja) | 画像メモリ装置 | |
| JPH0198083A (ja) | フレーム・バッファ並列処理制御回路 | |
| JPS58100180A (ja) | キヤラクタ表示方式 | |
| JPS649637B2 (enExample) | ||
| JPS59116784A (ja) | 表示属性制御方式 | |
| JPH0197988A (ja) | グラフィックス・ディスプレイ・コントローラ |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |