JPS6143866B2 - - Google Patents
Info
- Publication number
- JPS6143866B2 JPS6143866B2 JP53152860A JP15286078A JPS6143866B2 JP S6143866 B2 JPS6143866 B2 JP S6143866B2 JP 53152860 A JP53152860 A JP 53152860A JP 15286078 A JP15286078 A JP 15286078A JP S6143866 B2 JPS6143866 B2 JP S6143866B2
- Authority
- JP
- Japan
- Prior art keywords
- diffusion
- window
- impurity
- substrate
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15286078A JPS5578574A (en) | 1978-12-09 | 1978-12-09 | Manufacture of insulated-gate field-effect transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15286078A JPS5578574A (en) | 1978-12-09 | 1978-12-09 | Manufacture of insulated-gate field-effect transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5578574A JPS5578574A (en) | 1980-06-13 |
JPS6143866B2 true JPS6143866B2 (enrdf_load_stackoverflow) | 1986-09-30 |
Family
ID=15549696
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15286078A Granted JPS5578574A (en) | 1978-12-09 | 1978-12-09 | Manufacture of insulated-gate field-effect transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5578574A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020149648A1 (ko) * | 2019-01-15 | 2020-07-23 | 엘지전자 주식회사 | 변환 스킵 플래그를 이용한 영상 코딩 방법 및 장치 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2531572A1 (fr) * | 1982-08-09 | 1984-02-10 | Radiotechnique Compelec | Dispositif mos a structure plane multicellulaire |
US4883767A (en) * | 1986-12-05 | 1989-11-28 | General Electric Company | Method of fabricating self aligned semiconductor devices |
US4801986A (en) * | 1987-04-03 | 1989-01-31 | General Electric Company | Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method |
US4823176A (en) * | 1987-04-03 | 1989-04-18 | General Electric Company | Vertical double diffused metal oxide semiconductor (VDMOS) device including high voltage junction exhibiting increased safe operating area |
JPH01194364A (ja) * | 1988-01-28 | 1989-08-04 | Nec Corp | 縦型高耐圧半導体装置 |
JPH01262668A (ja) * | 1988-04-13 | 1989-10-19 | Mitsubishi Electric Corp | 電界効果型半導体装置 |
US6870218B2 (en) * | 2002-12-10 | 2005-03-22 | Fairchild Semiconductor Corporation | Integrated circuit structure with improved LDMOS design |
-
1978
- 1978-12-09 JP JP15286078A patent/JPS5578574A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020149648A1 (ko) * | 2019-01-15 | 2020-07-23 | 엘지전자 주식회사 | 변환 스킵 플래그를 이용한 영상 코딩 방법 및 장치 |
Also Published As
Publication number | Publication date |
---|---|
JPS5578574A (en) | 1980-06-13 |
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