JPS6134741U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS6134741U JPS6134741U JP1984117137U JP11713784U JPS6134741U JP S6134741 U JPS6134741 U JP S6134741U JP 1984117137 U JP1984117137 U JP 1984117137U JP 11713784 U JP11713784 U JP 11713784U JP S6134741 U JPS6134741 U JP S6134741U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor equipment
- abstract
- recorded
- electronic filing
- before electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は本発明の一実施例の斜視図a及び断面図b、第
2図ないし第4歯は本発明の別の実施例を示す一部断面
斜視図、第5図はP−n接合の電圧一電流特性図、第6
図は第四実施例ないし第七実施例の断面図である。 1・・・シリコンチツ7’、2,7,8,10・・・電
極、3,6・・・P型層、4・・・n型層、9・・・薄
膜。
2図ないし第4歯は本発明の別の実施例を示す一部断面
斜視図、第5図はP−n接合の電圧一電流特性図、第6
図は第四実施例ないし第七実施例の断面図である。 1・・・シリコンチツ7’、2,7,8,10・・・電
極、3,6・・・P型層、4・・・n型層、9・・・薄
膜。
Claims (1)
- 【実用新案登録請求の範囲】 シリコン半導体装置において、 回路を形成する面の反対側の面に、通電により発熱する
部材を備えたことを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984117137U JPS6134741U (ja) | 1984-08-01 | 1984-08-01 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984117137U JPS6134741U (ja) | 1984-08-01 | 1984-08-01 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6134741U true JPS6134741U (ja) | 1986-03-03 |
Family
ID=30676047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984117137U Pending JPS6134741U (ja) | 1984-08-01 | 1984-08-01 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6134741U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019150687A1 (ja) * | 2018-02-05 | 2019-08-08 | 千住スプリンクラー株式会社 | スプリンクラーヘッド |
-
1984
- 1984-08-01 JP JP1984117137U patent/JPS6134741U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019150687A1 (ja) * | 2018-02-05 | 2019-08-08 | 千住スプリンクラー株式会社 | スプリンクラーヘッド |
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