JPS61274399A - 多層セラミック基板用組成物および多層セラミック基板の製造方法 - Google Patents

多層セラミック基板用組成物および多層セラミック基板の製造方法

Info

Publication number
JPS61274399A
JPS61274399A JP60116085A JP11608585A JPS61274399A JP S61274399 A JPS61274399 A JP S61274399A JP 60116085 A JP60116085 A JP 60116085A JP 11608585 A JP11608585 A JP 11608585A JP S61274399 A JPS61274399 A JP S61274399A
Authority
JP
Japan
Prior art keywords
substrate
composition
multilayer ceramic
glass
inorganic filler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60116085A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0467800B2 (enExample
Inventor
平野　隆男
久富 田口
松永　博和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Noritake Co Ltd
Original Assignee
Noritake Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Noritake Co Ltd filed Critical Noritake Co Ltd
Priority to JP60116085A priority Critical patent/JPS61274399A/ja
Publication of JPS61274399A publication Critical patent/JPS61274399A/ja
Publication of JPH0467800B2 publication Critical patent/JPH0467800B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Compositions Of Oxide Ceramics (AREA)
JP60116085A 1985-05-29 1985-05-29 多層セラミック基板用組成物および多層セラミック基板の製造方法 Granted JPS61274399A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60116085A JPS61274399A (ja) 1985-05-29 1985-05-29 多層セラミック基板用組成物および多層セラミック基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60116085A JPS61274399A (ja) 1985-05-29 1985-05-29 多層セラミック基板用組成物および多層セラミック基板の製造方法

Publications (2)

Publication Number Publication Date
JPS61274399A true JPS61274399A (ja) 1986-12-04
JPH0467800B2 JPH0467800B2 (enExample) 1992-10-29

Family

ID=14678337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60116085A Granted JPS61274399A (ja) 1985-05-29 1985-05-29 多層セラミック基板用組成物および多層セラミック基板の製造方法

Country Status (1)

Country Link
JP (1) JPS61274399A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331197A (ja) * 1986-07-25 1988-02-09 富士通株式会社 多層回路基板の製造方法
JPS63283192A (ja) * 1987-05-15 1988-11-21 Tanaka Massey Kk 多層配線板
JPS63283193A (ja) * 1987-05-15 1988-11-21 Tanaka Massey Kk 多層配線板
JPH01251688A (ja) * 1988-03-31 1989-10-06 Ngk Insulators Ltd 配線基板
JPH0497941A (ja) * 1990-08-10 1992-03-30 Taiyo Yuden Co Ltd 低温焼成セラミック基板およびその製造方法
WO1994001377A1 (fr) * 1992-07-07 1994-01-20 Toray Industries, Inc. Feuille ceramique crue

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154079A (en) * 1978-05-25 1979-12-04 Fujitsu Ltd Method of producing multiilayer circuit board
JPS59130005A (ja) * 1983-01-18 1984-07-26 旭硝子株式会社 厚膜回路絶縁層用組成物
JPS59162169A (ja) * 1983-03-04 1984-09-13 株式会社日立製作所 セラミック多層配線板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154079A (en) * 1978-05-25 1979-12-04 Fujitsu Ltd Method of producing multiilayer circuit board
JPS59130005A (ja) * 1983-01-18 1984-07-26 旭硝子株式会社 厚膜回路絶縁層用組成物
JPS59162169A (ja) * 1983-03-04 1984-09-13 株式会社日立製作所 セラミック多層配線板

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331197A (ja) * 1986-07-25 1988-02-09 富士通株式会社 多層回路基板の製造方法
JPS63283192A (ja) * 1987-05-15 1988-11-21 Tanaka Massey Kk 多層配線板
JPS63283193A (ja) * 1987-05-15 1988-11-21 Tanaka Massey Kk 多層配線板
JPH01251688A (ja) * 1988-03-31 1989-10-06 Ngk Insulators Ltd 配線基板
JPH0497941A (ja) * 1990-08-10 1992-03-30 Taiyo Yuden Co Ltd 低温焼成セラミック基板およびその製造方法
WO1994001377A1 (fr) * 1992-07-07 1994-01-20 Toray Industries, Inc. Feuille ceramique crue

Also Published As

Publication number Publication date
JPH0467800B2 (enExample) 1992-10-29

Similar Documents

Publication Publication Date Title
US4766010A (en) Process for manufacturing dielectric layers formed from ceramic compositions containing inorganic peroxide and electronic devices including said layers
US4551357A (en) Process of manufacturing ceramic circuit board
US4837408A (en) High density multilayer wiring board and the manufacturing thereof
JPS61274399A (ja) 多層セラミック基板用組成物および多層セラミック基板の製造方法
JPS61275161A (ja) 低温焼成多層セラミツク基板
JPH02141458A (ja) 低温焼成セラミック多層基板およびその製造方法
JPH04329691A (ja) 導体ぺーストおよび配線基板
JPS6325271A (ja) 低温焼成多層セラミツク基板
JPH04328207A (ja) 導体組成物および配線基板
JPS63215548A (ja) 電気抵抗体及びその製造方法
JPS63215551A (ja) 電気抵抗体及びその製造方法
JPS6077187A (ja) セラミツク電子部品及びその製造法
JPS61170094A (ja) セラミツク多層配線基板の製造法
JPH0469587B2 (enExample)
JPS63215547A (ja) 電気抵抗体及びその製造方法
JPH0997703A (ja) 低温焼成基板に内蔵される抵抗ペースト
JP2006093569A (ja) ガラスセラミック配線基板
JPS63215552A (ja) 電気抵抗体及びその製造方法
JPH0428128B2 (enExample)
JPH0428127B2 (enExample)
JPH01246176A (ja) 多層基板用低温焼結磁器組成物
JPH0428126B2 (enExample)
JPS63213302A (ja) 電気抵抗体及びその製造方法
JPH0429203B2 (enExample)
JPS63215549A (ja) 電気抵抗体及びその製造方法

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees