JPS61253592A - Integrated circuit card - Google Patents

Abstract

PURPOSE:To obtain an integrated circuit IC card having extremely high resistance to electrostatic charge by connecting a parallel circuit of a depression type FET and a Zener diode to a place between each electrode terminal on the surface of the IC card and the earth. CONSTITUTION:The drains and sources of depression type FET elements 3-1-3-7 and Zener diodes 4-1-4-7 are connected between electrode terminals 2-1-2-7 of an IC chip and an earth electrode terminal 2-8. The gate of each FET element is connected to a bias circuit consisting of resistance elements 5 and 6. When the IC card is not used, each electrode terminal is connected to the earth at a sufficiently low level of impedance. The potential of each electrode terminal never has a big rise even though the electrostatic charge is applied to the electrode terminal. When the information is read out and written with the IC card, each FET element is turned off by a bias circuit set between the terminal 2-1 and the terminal 2-8.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an IC card containing an IC chip therein.

Conventional technologyConoCard concepts and IC card construction methods are discussed, for example, in "IC1eatronic Memory Card" by Paul Parmentier.
: Technology around it
“Engineering No. 1982 Proceedings,
Tokyo.

May 24-26.1982 PF439-445.

As shown in this document, the concept of this industrial C card was devised to further improve the security of the widely used business card-sized magnetic cards. It has a structure in which an IC chip is embedded inside a PVA card that has a magnetic stripe, and its electrode portions are exposed on the card surface.

As mentioned above, when the electrode part is exposed on the card surface,
Although it depends on the material of the card, static charges often adhere to the above-mentioned electrode parts, and when a MO3 structure memory chip is introduced as an IC chip, each IC chip is easily destroyed by static charges, so this problem is particularly problematic. is important. As a countermeasure against this static charge, several proposals have been proposed so far.

For example, a method of covering the periphery of the electrode portion with a shielding electrode connected to ground is disclosed in Japanese Patent Publication No. 57-188.
No. 849 "Device for protecting electronic circuits from static charges" discloses that each electrode of the electrode part is formed on a semiconductive circuit board, a resistive element is connected between each electrode, Furthermore, there is a method of providing a minute current path between each electrode of the electrode part and taking measures against static charges by adopting a structure in which a semiconductive adhesive material is attached across each of the electrodes. Published Patent Publication No. 59-22353,
“IC card”, Publication No. 59-22354, 1IC
"C Card", Publication No. 59-22355, 1-Work C Card.

Problems to be Solved by the Invention As mentioned above, countermeasures against static charges in IC cards are extremely important problems, and various countermeasures are being proposed. Although the method of using the shielding electrode described above reduces the probability that static charges will be inadvertently applied to each electrode, it cannot be reduced to zero.
In addition, the method of providing a minute current path between each electrode is not a complete countermeasure against static charge because if the impedance of the current path is large, the rise in potential due to static charge is large.If the impedance of the current path is lowered, each Signal leakage occurs between the electrodes, creating new problems.

Means for Solving the Problems The present invention provides electrode sections provided on the surface of the IC card for connecting an IC chip included in the IC card and its peripheral circuit section with an external circuit section, A depletion type lFE is connected between the earth electrodes of the circuit section.
A non-linear semiconductor element such as a Zener diode, which is connected in parallel to the T element and is in a cutoff region in the operating power supply of the IC card, is provided, and the drain of each depletion type NET element is connected to the surface of the IC card. Connect to each electrode part provided in the depression type 1P
A source of the circuit is connected to the ground electrode, and each gate is connected to an electrode for connecting a DC power supply provided on the surface of the C card and a bias circuit connected to the ground electrode. An IC is connected between the electrode and the ground electrode.
The bias circuit operates only when a DC power supply is connected when the card is used, and each depression type PRE
When the T element is used in the cut-off region and the FIT card is not used, the gate of the depletion FIT element is kept at the same potential as the source electrode by the bias circuit, so that when the C card is not used, the surface of the C card is A conductive path is provided between each electrode provided in the I and the ground electrode due to low impedance between the drain and the source of the depletion type FIT element, and a conductive path is provided between each electrode provided in the I
If the operating power supply of the C card is exceeded, the non-linear semiconductor element having a Zener region will greatly reduce the potential of each electrode even if electrostatic charge is inadvertently applied to each electrode section provided on the surface of the C card. In addition, the depletion type FIT element, the nonlinear semiconductor element, and the bias circuit are formed simultaneously in an IC chip included in the IC card using monolithic material or the like.

Operation According to the above-described structure, when the IC card is not in use, each electrode provided on the surface of the IC card and the ground electrode are connected with a low impedance between the drain and source of the depletion type IPET element with zero bias. , and the operating power supply of the industrial C card is in the cutoff region, but above the operating power supply, even if electrostatic charge is inadvertently applied to each electrode due to the non-linear semiconductor element having a Zener region, the potential of that electrode remains unchanged. The IC chip provided in the IC card can be protected from destruction due to static charge without increasing much, and an extremely stable IC card can be obtained.

In addition, by using the DC power supply to operate the IC card and operating the bias circuit, the above-mentioned F
By turning off the KoT element, you can do this separately! FET
A control voltage application terminal for turning off the element is not required, and an IC card that is extremely stable against electrostatic damage can be obtained with an electrode configuration that is compatible with conventional IC cards.

Embodiment Hereinafter, a construction C card according to an embodiment of the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram mainly showing the surface electrode part of an embodiment of the IC card of the present invention, and FIG. 2 is a characteristic diagram showing Zener characteristics when a Zener diode MA2062 is used as a nonlinear semiconductor element. , Figure 3 shows a junction type FKT2S, r8 as a P-channel depletion type FET element.
A characteristic diagram showing the drain-source characteristics when using 4.
Figure 4 shows Zener diode MA2062 and junction type IP
Characteristic diagram obtained when KTZSJ84 is connected in parallel,
shows.

In Figure 1, (1) is an IC chip, 2.1 to 2.
Numbers up to 8 indicate electrode terminals on the surface of the IC card.

Here, electrode terminals 2.1 are power supply electrodes for power connection, electrode terminals 2.8 are ground electrodes, and electrode terminals 2.1 and 2.8 are
A resistance element (5) l [61 is connected to the resistor element (5) l (6), and this resistance element (5) l (6) is a depression type FIT.
It operates as a bias circuit for element 3.1.3φ2.3.3.

Depression type IPET elements 3, 1 to 3, are connected between the electrode terminals 2 and 2 and 7 and the ground electrode terminals 2 and 8, respectively.
7 (IPET elements 3114.3-5.3, 6.3, 7 are not shown) and Zener diodes 4.1 to 4.7 (Zener diodes 4, 4.4,
5.4, 6.4, and 7 (not shown) are connected, and each of the above I
The gate of the MCT element is connected to a bias circuit composed of resistance elements (51, (6)).

In Fig. 1, when this C card is not used, no other external circuit is connected to each electrode terminal 2 to 2 and 8.
Since the gate-source voltage is zero, the drain-source impedance of each IFK'X' element 3.1 to 3.7 is as shown in FIG.
Channel junction type FIcT.

When 2S and Ta2 are used, the value is as low as about 150 ohms, which means that each electrode terminal 2.1 to 2.7 is connected to the ground with sufficiently low impedance. and,
A Zener diode island MA2062 as shown in FIG. 2 is connected in parallel to each of the FET elements,
At this time, the characteristics when the gate-source voltage of the F]liT element is zero are as shown in FIG.

Therefore, in this case, the electrode terminal? - Even if electrostatic charges are inadvertently applied to terminals 1 to 2 and 7, the potential of each of these electrode terminals will not increase significantly, and the circuit inside the C card can be protected.

In order to read and write information to the IC card configured in this way, it is desirable to use the IFET elements 3.1 to 3.7 in the OFF state. As is clear from the characteristics of the figure,
All you need to do is apply a DC voltage of about 1 volt to the gate.
A bias circuit provided between the power supply electrode terminals 2.1 and the earth electrode terminals 2.8 is provided to realize this. Furthermore, when reading or writing information, each of the Zener diodes is set to be in a cutoff region, as shown in FIG. In this example,
When the operating power supply of the engineering C card is 5 volts, approximately 6.
A Zener diode, MA2062, which has Zener characteristics at a voltage of 2 volts or more is used.

The above explanation assumes that a positive DC voltage is applied to the power supply electrode terminal 2.1 and uses a P-channel junction type lFET, but when a negative DC voltage is applied to the power supply electrode terminal 2.1 Is there an N-channel type? Needless to say, 11tT may be used.

In addition, in order to improve the resistance to static charge of each electrode terminal 2.1 to 2.8 in FIG.
・Each electrode terminal from 1 to 2 and 7 and earth electrode terminal 2・
Of course, a resistive element may be connected between 8 and 8.

Furthermore, although a junction FET has been described here as a depletion WPET element, it goes without saying that an MO8 type IFET can also be employed in the same manner.

Also, these depression type PI! It goes without saying that it is desirable from economical considerations to use non-linear semiconductor elements such as T-elements and Zener diodes by simultaneously fabricating them in monolithic IC chips for industrial C cards.

In order to further improve the resistance to static electricity in the circuit of this embodiment described above, a protective resistive element is provided in series with each electrode terminal 2.1 to 2.7, and this protective resistive element is connected to each electrode terminal. When electrostatic charges are inadvertently applied to 2.1 to 2.7, the current flowing to the FET element and nonlinear semiconductor element is limited, and the other operations are exactly the same as those in Figure 1. It may be set as follows.

It should be noted that the bias circuit shown in FIG. 1 shows the simplest case, and it goes without saying that various changes can be made without departing from the spirit of the present invention.

Effects of the Invention As described above, the present invention has a simple structure in which a parallel circuit of a depletion type IFIT and a Zener diode is connected between each electrode terminal on the surface of an IC card and the ground, which makes it extremely resistant to static charges. It produces an effect that allows you to obtain a certain engineering C card.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram mainly showing the surface electrode portion of an embodiment of the industrial C card of the present invention, and Fig. 2 shows the Zener characteristics when a Zener diode MA 2062 is used as a nonlinear semiconductor element. The characteristic diagram shown in Figure 3 is a junction type PKT2SJ as a P-channel depletion type F'ET element.
Figure 4 is a characteristic diagram showing the drain-source characteristics when using a Zener diode MA2062 and a junction type F
A characteristic diagram obtained when KT2SJ84 are connected in parallel and the gate-source voltage of the FET element is zero is shown. 1: IC chip 2.1~2Φ8: Electrode terminal on the surface of the engineering C card 2.1: Electrode terminal for connecting DC power supply 2.
8: Earth electrode terminal 3-1~3ψ7; Depression type IPET element 4-1~4@7: Nonlinear semiconductor element 5, 6: Resistance element for bias circuit

Claims (2)

[Claims] (1) Between each electrode section provided on the surface of the IC card that connects the IC chip included in the IC card and its peripheral circuit section with an external circuit section, and the ground electrode of the IC chip and peripheral circuit section, respectively. A non-linear semiconductor element such as a Sienna diode, which is connected in parallel to the depletion type FET element and is in a cutoff region in the operating power supply of the IC card, is provided, and each depletion type FET element is connected in parallel to the depletion type FET element.
The drain of the T element is connected to each electrode provided on the surface of the IC card, the source of the depletion type FET is connected to the ground electrode, and each gate is connected to a direct current provided on the surface of the IC card. A bias circuit connected to a power supply connection electrode and the ground electrode is connected, and the bias circuit operates only when a DC power supply is connected between the DC power supply connection electrode and the ground electrode when the IC card is used. , each of the depletion type FET elements described above is used in the cut-off region, and when the IC card is not used, the gate of the depletion type FET element is kept at the same potential as the source electrode by the bias circuit, whereby the IC card is not used. In some cases, a conductive path is provided between each electrode provided on the surface of the IC card and the ground electrode due to the low impedance between the drain and source of the depletion type FET element, and the voltage is higher than the operating power supply of the IC card. A non-linear semiconductor element having a Zener region prevents the potential of each electrode from increasing significantly even if electrostatic charge is inadvertently applied to each electrode portion provided on the surface of the IC card. IC card. (2) The IC according to claim 1, wherein the depletion type FET element, the nonlinear semiconductor element, and the bias circuit are formed simultaneously in an IC chip included in an IC card using monolithic or the like. card.