JPS6125168B2 - - Google Patents

Info

Publication number
JPS6125168B2
JPS6125168B2 JP56099326A JP9932681A JPS6125168B2 JP S6125168 B2 JPS6125168 B2 JP S6125168B2 JP 56099326 A JP56099326 A JP 56099326A JP 9932681 A JP9932681 A JP 9932681A JP S6125168 B2 JPS6125168 B2 JP S6125168B2
Authority
JP
Japan
Prior art keywords
instruction
prefetch control
storage device
contents
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56099326A
Other languages
English (en)
Japanese (ja)
Other versions
JPS581247A (ja
Inventor
Mitsuaki Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9932681A priority Critical patent/JPS581247A/ja
Publication of JPS581247A publication Critical patent/JPS581247A/ja
Publication of JPS6125168B2 publication Critical patent/JPS6125168B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
JP9932681A 1981-06-26 1981-06-26 命令先取り制御方法 Granted JPS581247A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9932681A JPS581247A (ja) 1981-06-26 1981-06-26 命令先取り制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9932681A JPS581247A (ja) 1981-06-26 1981-06-26 命令先取り制御方法

Publications (2)

Publication Number Publication Date
JPS581247A JPS581247A (ja) 1983-01-06
JPS6125168B2 true JPS6125168B2 (fr) 1986-06-14

Family

ID=14244505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9932681A Granted JPS581247A (ja) 1981-06-26 1981-06-26 命令先取り制御方法

Country Status (1)

Country Link
JP (1) JPS581247A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047801A (ja) * 1983-08-25 1985-03-15 Toshiba Corp タ−ビン制御装置
US4775927A (en) * 1984-10-31 1988-10-04 International Business Machines Corporation Processor including fetch operation for branch instruction with control tag
JPS61165145A (ja) * 1984-12-24 1986-07-25 Fujitsu Ltd アクセス要求取消制御方式

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5582357A (en) * 1978-12-15 1980-06-21 Nec Corp Information processing unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5582357A (en) * 1978-12-15 1980-06-21 Nec Corp Information processing unit

Also Published As

Publication number Publication date
JPS581247A (ja) 1983-01-06

Similar Documents

Publication Publication Date Title
US4777588A (en) General-purpose register file optimized for intraprocedural register allocation, procedure calls, and multitasking performance
JPS63503177A (ja) 命令先取制御装置
US4985826A (en) Method and device to execute two instruction sequences in an order determined in advance
JPS6125168B2 (fr)
KR860007590A (ko) 버퍼메모리 제어시스템
JPS6232508B2 (fr)
JPS6032220B2 (ja) 情報処理装置
JP3130798B2 (ja) バス転送装置
JPS6148741B2 (fr)
JP2540959B2 (ja) 情報処理装置
JPS595496A (ja) メモリプロテクト方式
JPS6047617B2 (ja) 情報処理装置
JPS5922314B2 (ja) 記憶装置書込み方式
JP2902847B2 (ja) 自己変更コード実行方式
JPS6391756A (ja) 記憶装置の部分書き込み命令処理方式
JPS6047616B2 (ja) 情報処理装置
KR880011658A (ko) 정보 처리장치
JPH0497459A (ja) キャッシュ一致処理方式
JPH0526216B2 (fr)
JPS6051736B2 (ja) 情報処理装置
JPS62127943A (ja) 命令バツフア制御方式
JPH0136198B2 (fr)
JPH0667982A (ja) アドレス変換方式
JPS6036614B2 (ja) 情報処理装置
JPH0769815B2 (ja) 情報処理装置