JPS6124823B2 - - Google Patents

Info

Publication number
JPS6124823B2
JPS6124823B2 JP55149896A JP14989680A JPS6124823B2 JP S6124823 B2 JPS6124823 B2 JP S6124823B2 JP 55149896 A JP55149896 A JP 55149896A JP 14989680 A JP14989680 A JP 14989680A JP S6124823 B2 JPS6124823 B2 JP S6124823B2
Authority
JP
Japan
Prior art keywords
chips
metal pads
integrated circuit
chip
probe card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55149896A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5773954A (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP55149896A priority Critical patent/JPS5773954A/ja
Publication of JPS5773954A publication Critical patent/JPS5773954A/ja
Publication of JPS6124823B2 publication Critical patent/JPS6124823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)
JP55149896A 1980-10-25 1980-10-25 Integrated circuit Granted JPS5773954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55149896A JPS5773954A (en) 1980-10-25 1980-10-25 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55149896A JPS5773954A (en) 1980-10-25 1980-10-25 Integrated circuit

Publications (2)

Publication Number Publication Date
JPS5773954A JPS5773954A (en) 1982-05-08
JPS6124823B2 true JPS6124823B2 (https=) 1986-06-12

Family

ID=15484980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55149896A Granted JPS5773954A (en) 1980-10-25 1980-10-25 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS5773954A (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0777226B2 (ja) * 1987-06-30 1995-08-16 株式会社日立製作所 半導体装置およびその製造方法
JP3151203B2 (ja) * 1988-11-23 2001-04-03 テキサス インスツルメンツ インコーポレイテツド 集積回路の自己検査装置
JPH0429346A (ja) * 1990-05-24 1992-01-31 Mitsubishi Electric Corp 半導体装置
JPH05166895A (ja) * 1991-12-19 1993-07-02 Kawasaki Steel Corp 半導体集積回路

Also Published As

Publication number Publication date
JPS5773954A (en) 1982-05-08

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