JPS61241953A - Leadframe and semiconductor device using said leadframe - Google Patents

Leadframe and semiconductor device using said leadframe

Info

Publication number
JPS61241953A
JPS61241953A JP60082467A JP8246785A JPS61241953A JP S61241953 A JPS61241953 A JP S61241953A JP 60082467 A JP60082467 A JP 60082467A JP 8246785 A JP8246785 A JP 8246785A JP S61241953 A JPS61241953 A JP S61241953A
Authority
JP
Japan
Prior art keywords
lead
leads
polyimide resin
resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60082467A
Other languages
Japanese (ja)
Inventor
Michio Tanimoto
道夫 谷本
Michio Okamoto
道夫 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60082467A priority Critical patent/JPS61241953A/en
Publication of JPS61241953A publication Critical patent/JPS61241953A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49558Insulating layers on lead frames, e.g. bridging members
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To ensure the fixing of a lead, by linking the tips of the leads by using synthetic resin. CONSTITUTION:An inner lead 4a is formed at a part of each lead 4, which is surrounded by a tie bar 5. The tips of the inner leads 4a are linked by polyimide resin 8. In a leadframe 1, etching is performed in a square sheet form, and a lead pattern is formed. Then the liquid-state polyimide resin is dropped by using an injector-shaped jig to the tips of the leads continuously from the back surface side of the leadframe 1. The polyimide resin 8 is solidified. At this time, the tip of each lead 4 is linked under the state that the surface side of the lead 4 is exposed to the outside and the tip is immersed in the polyimide resin 8. Even if ultrasonic wave vibration is applied, the leads are not vibrated, and the leads and wires can be rigidly bonded.

Description

【発明の詳細な説明】 [技術分野] 本発明はリードフレーム、特に半導体装置の製造工程に
おける作業性向上に適用して有効な技術に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to improve workability in the manufacturing process of lead frames, particularly semiconductor devices.

C背景技術] ペレットとリードとの電気的導通を達成するためのワイ
ヤボンディング工程では、加熱による素子の損傷もしく
は接合部のパープルブレーグの発生を防止するため、超
音波振動と熱圧着を併用した、低加熱条件で接合を行う
ことができる、いわゆるサーモソニックボンディング法
によるワイヤボンディング方法が知られている。
C Background technology] In the wire bonding process to achieve electrical continuity between the pellet and the lead, ultrasonic vibration and thermocompression bonding are used in combination to prevent damage to the element due to heating or the occurrence of purple breakage at the joint. A wire bonding method using a so-called thermosonic bonding method is known, which allows bonding to be performed under low heating conditions.

ところで、ワイヤの接合に際して超音波が使用されるよ
うになると、ワイヤを接合するインナーリードを如何に
して確実に固定するかが問題となる。
By the way, when ultrasonic waves are used to join wires, a problem arises as to how to reliably fix the inner lead to which the wires are joined.

すなわち、各インナーリードがボンデインダステージ上
で固定されず浮動状態になっていると、超音波振動を印
加した際に振動がリードの動揺によって吸収されてしま
い、接合不良を生じる可能性が高いためである。
In other words, if each inner lead is not fixed on the bonder stage and is in a floating state, when ultrasonic vibration is applied, the vibration will be absorbed by the oscillation of the lead, and there is a high possibility of bonding failure. It is.

この点につき、ポリイミド等からなるテープに接着剤を
塗布して各インナーリードを連結し、各インナーリード
先端を互いに固定することが考えられる。
Regarding this point, it is conceivable to apply adhesive to a tape made of polyimide or the like to connect each inner lead and fix the tips of each inner lead to each other.

ところが、半導体装置の高集積化に伴いリード本数が増
加し各リードが微細化してくると上記のテープによる方
法では、各リードとテープとの接着面積が微小となり、
確実にリードを固定することができなくなることが本発
明者によって明らかにされた。
However, as semiconductor devices become more highly integrated, the number of leads increases and each lead becomes smaller, and in the above method using tape, the bonding area between each lead and the tape becomes minute.
The inventor has revealed that the lead cannot be securely fixed.

さらに、低加熱条件ではあってもたとえば200℃前後
の加熱は必要であるため、耐熱性の低い接着剤を塗布し
たテープではリードの固定を確実に行うことが出来ない
ことも本発明者によって明らかにされた。
Furthermore, the inventors also found that it is not possible to reliably fix the leads with tape coated with adhesive with low heat resistance, since heating to around 200°C is necessary even under low heating conditions. was made into

なお、超音波振動を利用したワイヤボンディングの技術
として詳しく述べである例としては、株式会社工業調査
会、1980年1月15日発行「IC化実装技術」 (
日本マイクロエレクトロニクス協会&I)、P102〜
P103がある。
A detailed example of wire bonding technology using ultrasonic vibration is given in "IC Mounting Technology" published by Industrial Research Association Co., Ltd., January 15, 1980 (
Japan Microelectronics Association & I), P102~
There is P103.

[発明の目的] 本発明の目的は、ワイヤボンディングに際してリードを
確実に固定することのできる技術を提供することにある
[Object of the Invention] An object of the present invention is to provide a technique that can reliably fix leads during wire bonding.

本発明の他の目的は信鯨性の高い高集積型半導体装置を
提供することにある。
Another object of the present invention is to provide a highly integrated semiconductor device with high reliability.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[発明の概要] 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。
[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

すなわち、リード先端を合成樹脂を用いて互いに連結す
ることによって、ワイヤボンディングに際して、微細な
リードも確実に固定することができるため、超音波振動
を用いたワイヤの接合を確実に行うことができる。
That is, by connecting the lead tips to each other using synthetic resin, even minute leads can be reliably fixed during wire bonding, so that wire bonding using ultrasonic vibration can be performed reliably.

また、これによりボンディング不良のない信−頁性の高
い高集積型半導体装置を提供することができる。
Moreover, this makes it possible to provide a highly integrated semiconductor device with high reliability and no bonding defects.

[実施例] 第1図は本発明の一実施例であるリードフレームを示す
平面図、第2図はそれを用いた半導体装置を示す断面図
、第3図はリードフレームの先端近傍を示す拡大部分断
面図、第4図はその変形例を示す拡大部分断面図である
[Example] Fig. 1 is a plan view showing a lead frame which is an embodiment of the present invention, Fig. 2 is a sectional view showing a semiconductor device using the lead frame, and Fig. 3 is an enlarged view showing the vicinity of the tip of the lead frame. FIG. 4 is an enlarged partial sectional view showing a modification thereof.

本実施例のリードフレーム1は、樹脂封止型のフラット
パッケージいわゆるPPP型の半導体装置2に用いられ
るリードフレームであり、第1図に示す形状のものを一
単位として、左右両方向に複数単位を連設した形状から
なるものである。
The lead frame 1 of this embodiment is a lead frame used for a resin-sealed flat package so-called PPP type semiconductor device 2, and a plurality of units are formed in both the left and right directions, with the shape shown in FIG. It consists of a series of shapes.

リードフレーム1は四角形状の枠部3と、該枠部3の各
辺から中央方向に延設された複数のリード4と、そのリ
ード4の長さ方向の途中部分を互いに連結するタイバー
5により構成されている。
The lead frame 1 includes a rectangular frame portion 3, a plurality of leads 4 extending from each side of the frame portion 3 toward the center, and tie bars 5 that connect intermediate portions of the leads 4 to each other in the length direction. It is configured.

また、リードフレームlの中央部分には四角形状のタブ
6が設けられており、このタブ6はタブ6の四隅と枠部
2の四隅とを各々連結するタブ吊りリード7により支持
されている。
Further, a rectangular tab 6 is provided at the center of the lead frame 1, and this tab 6 is supported by tab suspension leads 7 that connect the four corners of the tab 6 and the four corners of the frame portion 2, respectively.

前記リード4のタイバー5に囲まれた部分はインナーリ
ード4aを形成しており、さらにインナーリード4aの
先端は各々ポリイミド樹脂8により連結されている。
The portions of the leads 4 surrounded by the tie bars 5 form inner leads 4a, and the tips of the inner leads 4a are connected to each other by polyimide resin 8.

このリードフレーム1は例えば、1i(Cu)、42ア
ロイもしくはコバールからなる四角形状のシートにエツ
チング処理を施して前記リードパターンを形成した後に
、リードフレーム1の背面側からり−ド4の先端に注射
器状の治具を用いて連続的に液状のポリイミド樹脂8を
滴下し、該ポリイミド樹脂8を固化させることにより得
ることができる。このとき、各リード4の先端は第3図
に示すようにリード4の表面側を外部に露出してポリイ
ミド樹脂8に浸されたような状態で連結されている。
This lead frame 1 is made by etching a rectangular sheet made of, for example, 1i (Cu), 42 alloy, or Kovar to form the lead pattern. It can be obtained by continuously dropping liquid polyimide resin 8 using a syringe-like jig and solidifying the polyimide resin 8. At this time, the tips of each lead 4 are connected in a state where the front surface side of the lead 4 is exposed to the outside and immersed in the polyimide resin 8, as shown in FIG.

なお、インナーリード4aの連結手段は上記のようにポ
リイミド樹脂のみによって行う他、第4図に示すように
ポリイミドテープ13上にポリイミド樹脂8を被着した
ものを用いてもよい。
In addition to using polyimide resin alone as the connection means for the inner leads 4a, as shown in FIG. 4, a polyimide resin 8 coated on a polyimide tape 13 may be used as the connection means for the inner leads 4a.

以上のようにして得られたリードフレーム1は、その後
タブ6上に銀等からなるペースト材9によってベレン)
10が取付けられ、さらに図示しないボンディングステ
ージ上に載置され、金等のワイヤ11によりペレット1
0とリード4との結線が行われる。この結線方法は図示
しないが、たとえば、ワイヤ11の一端を加熱してボー
ルを形成し、該ボール部分をペレット10のパッド上に
圧着した後、ループを描くようにして所定長さを確保し
て、他端側を超音波振動を印加しながらインナーリード
4aの所定部位に接合することにより行われるものであ
る。このとき、本実施例では、各インナーリード4aの
先端がポリイミド樹脂8により連結され、固定されてい
るため、超音波振動によりリード4が揺動することな(
、リード4とワイヤ11の接合が確実に行われる。
The lead frame 1 obtained as described above is then covered with a paste material 9 made of silver or the like on the tab 6.
10 is attached and further placed on a bonding stage (not shown), and the pellet 1 is attached with a wire 11 made of gold or the like.
0 and lead 4 are connected. Although this wire connection method is not shown, for example, one end of the wire 11 is heated to form a ball, the ball portion is crimped onto the pad of the pellet 10, and then a predetermined length is secured by drawing a loop. This is done by joining the other end to a predetermined portion of the inner lead 4a while applying ultrasonic vibration. At this time, in this embodiment, since the tips of each inner lead 4a are connected and fixed by the polyimide resin 8, the leads 4 do not swing due to ultrasonic vibration (
, the lead 4 and the wire 11 are reliably joined.

次にタイバー5に囲まれたインナーリード4aおよびペ
レットlOがエポキシ樹脂等の封止材12によってモー
ルドされ、さらにリード4を連結するタイバー5および
枠部3が切断・分離され、パッケージ(封止材12)か
ら突出した部分のリード4を所定形状、たとえばS字状
に成形することによって、第2図に示すように本実施例
の半導体装置2を得ることができる。
Next, the inner leads 4a and pellets 1O surrounded by the tie bars 5 are molded with a sealing material 12 such as epoxy resin, and the tie bars 5 and the frame 3 connecting the leads 4 are cut and separated, and the package (sealing material By forming the portion of the lead 4 protruding from the lead 12) into a predetermined shape, for example, an S-shape, the semiconductor device 2 of this embodiment can be obtained as shown in FIG.

[効果] (1)、リード先端が合成樹脂によって互いに連結され
た構造のリードフレームとすることによって、インナー
リードを確実に固定することができるため、超音波振動
を印加した際にもリードが揺動することなく、リードと
ワイヤの接合を確実に行うことができる。
[Effects] (1) By using a lead frame with a structure in which the lead tips are connected to each other by synthetic resin, the inner lead can be securely fixed, so the lead does not sway even when ultrasonic vibration is applied. Leads and wires can be reliably joined without moving.

(2)。前記(1)により、微細なリードであっても確
実に固定することができるため、微細なリードを用いた
リードフレームでの超音波ボンディングが可能となり、
半導体装置の高集積化を実現することができる。
(2). Due to (1) above, even minute leads can be securely fixed, making it possible to perform ultrasonic bonding on a lead frame using minute leads.
High integration of semiconductor devices can be achieved.

(3)、耐熱性樹脂を用いることにより、ワイヤボンデ
ィングに際して最適な温度条件の下でのボンディングが
可能となり、信頷性の高い接合強度を維持することがで
きる。
(3) By using a heat-resistant resin, bonding can be performed under optimal temperature conditions during wire bonding, and highly reliable bonding strength can be maintained.

(4)、上記(1)〜(3)により、信頼性の高い高集
積型半導体装置を提供することができる。
(4) According to (1) to (3) above, a highly reliable highly integrated semiconductor device can be provided.

以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。
Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

たとえば、実施例ではフラットパッケージ形状の半導体
装置に用いられるリードフレームについてのみ説明した
が、これに限らず、デュアルインラインパッケージ形状
の半導体装置に用いられるリードフレームであってもよ
い。
For example, in the embodiment, only a lead frame used for a flat package shaped semiconductor device has been described, but the present invention is not limited to this, and a lead frame used for a dual inline package shaped semiconductor device may be used.

また、リード先端を連結する樹脂についてもポリイミド
樹脂に限らず、電気的絶縁性を有するものであれば、耐
熱性のある他の種類の樹脂、たとえばエポキシ樹脂等で
あってもよい。
Further, the resin for connecting the lead tips is not limited to polyimide resin, but may be any other type of heat-resistant resin such as epoxy resin, as long as it has electrical insulation properties.

[利用分野] 以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である、いわゆる樹脂封止
型半導体装置に適用した場合について説明したが、これ
に限定されるものではなく、たとえば低融点ガラス等を
封止材として用いた気密封止型の半導体装置のリードフ
レームに適用しても有効な技術であることは勿論である
[Field of Application] In the above description, the invention made by the present inventor was mainly applied to the field of application which is the background thereof, which is a so-called resin-sealed semiconductor device, but the present invention is not limited to this. Of course, this technique is also effective when applied to lead frames of hermetically sealed semiconductor devices using, for example, low melting point glass as a sealing material.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例であるリードフレームを示す
平面図、 第2図は第1図の実施例のリードフレームを用いた本発
明の半導体装置の一実施例を示す断面図、第3図はリー
ドフレームの先端近傍を示す拡大部分断面図、 第4図はその変形例を示す拡大部分断面図である。 1・・・リードフレーム、2・・・半導体装置、3・・
・枠部、4・・・リード、4a・・・インナーリード、
5・・・タイバー、6・・・タブ、7・・・タブ吊りリ
ード、8・・・ポリイミド樹脂、9・・・ペースト材、
10・・・ペレット、11・・・ワイヤ、12・・・封
止材(パッケージ)。 第  1  図 第  2  図
1 is a plan view showing a lead frame as an embodiment of the present invention; FIG. 2 is a sectional view showing an embodiment of a semiconductor device of the present invention using the lead frame of the embodiment in FIG. 1; FIG. 3 is an enlarged partial sectional view showing the vicinity of the tip of the lead frame, and FIG. 4 is an enlarged partial sectional view showing a modification thereof. 1...Lead frame, 2...Semiconductor device, 3...
・Frame part, 4...Lead, 4a...Inner lead,
5... Tie bar, 6... Tab, 7... Tab suspension lead, 8... Polyimide resin, 9... Paste material,
10... Pellet, 11... Wire, 12... Sealing material (package). Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 1、枠部から中央方向に向かって複数のリードが延設さ
れてなるリードフレームであって、リード先端が合成樹
脂を介して互いに連結されていることを特徴とするリー
ドフレーム。 2、合成樹脂が耐熱性樹脂であることを特徴とする特許
請求の範囲第1項記載のリードフレーム。 3、耐熱性樹脂がポリイミド樹脂もしくはエポキシ樹脂
であることを特徴とする特許請求の範囲第2項記載のリ
ードフレーム。 4、ペレットおよびワイヤによりペレットと電気的に接
続されてなるリードの一部が封止されてなる半導体装置
であって、封止されるリードのペレット側先端が合成樹
脂を介して互いに連結されていることを特徴とする半導
体装置。 5、封止がレジンモールドによりなされていることを特
徴とする特許請求の範囲第4項記載の半導体装置。
[Claims] 1. A lead frame including a plurality of leads extending from a frame toward the center, the leads characterized in that the ends of the leads are connected to each other via a synthetic resin. flame. 2. The lead frame according to claim 1, wherein the synthetic resin is a heat-resistant resin. 3. The lead frame according to claim 2, wherein the heat-resistant resin is a polyimide resin or an epoxy resin. 4. A semiconductor device in which a part of a lead electrically connected to the pellet by a pellet and a wire is sealed, and the tips of the sealed leads on the pellet side are connected to each other via a synthetic resin. A semiconductor device characterized by: 5. The semiconductor device according to claim 4, wherein the sealing is performed by resin molding.
JP60082467A 1985-04-19 1985-04-19 Leadframe and semiconductor device using said leadframe Pending JPS61241953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60082467A JPS61241953A (en) 1985-04-19 1985-04-19 Leadframe and semiconductor device using said leadframe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60082467A JPS61241953A (en) 1985-04-19 1985-04-19 Leadframe and semiconductor device using said leadframe

Publications (1)

Publication Number Publication Date
JPS61241953A true JPS61241953A (en) 1986-10-28

Family

ID=13775310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60082467A Pending JPS61241953A (en) 1985-04-19 1985-04-19 Leadframe and semiconductor device using said leadframe

Country Status (1)

Country Link
JP (1) JPS61241953A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63258051A (en) * 1987-04-15 1988-10-25 Fuji Plant Kogyo Kk Leadframe with pin holding structure and pin holding method of leadframe
JPS63283054A (en) * 1987-03-11 1988-11-18 Fuji Plant Kogyo Kk Lead frame with pin-holding structure and holding method for pin of lead frame
JPS6481260A (en) * 1987-09-22 1989-03-27 Fuji Plant Kogyo Kk Manufacture of lead frame having pin-retention structure
JPH03209861A (en) * 1990-01-12 1991-09-12 Mitsui High Tec Inc Semiconductor device
US9299642B2 (en) 2013-06-10 2016-03-29 Fuji Electric Co., Ltd. Semiconductor device and method for producing same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63283054A (en) * 1987-03-11 1988-11-18 Fuji Plant Kogyo Kk Lead frame with pin-holding structure and holding method for pin of lead frame
JPH0464468B2 (en) * 1987-03-11 1992-10-15 Fuji Plant Kogyo Kk
JPS63258051A (en) * 1987-04-15 1988-10-25 Fuji Plant Kogyo Kk Leadframe with pin holding structure and pin holding method of leadframe
JPS6481260A (en) * 1987-09-22 1989-03-27 Fuji Plant Kogyo Kk Manufacture of lead frame having pin-retention structure
JPH03209861A (en) * 1990-01-12 1991-09-12 Mitsui High Tec Inc Semiconductor device
US9299642B2 (en) 2013-06-10 2016-03-29 Fuji Electric Co., Ltd. Semiconductor device and method for producing same

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