JPS61222151A - 半導体搭載用プリント配線板の製造方法 - Google Patents
半導体搭載用プリント配線板の製造方法Info
- Publication number
- JPS61222151A JPS61222151A JP60064599A JP6459985A JPS61222151A JP S61222151 A JPS61222151 A JP S61222151A JP 60064599 A JP60064599 A JP 60064599A JP 6459985 A JP6459985 A JP 6459985A JP S61222151 A JPS61222151 A JP S61222151A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- mounting
- sheet
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structure Of Printed Boards (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60064599A JPS61222151A (ja) | 1985-03-27 | 1985-03-27 | 半導体搭載用プリント配線板の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60064599A JPS61222151A (ja) | 1985-03-27 | 1985-03-27 | 半導体搭載用プリント配線板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61222151A true JPS61222151A (ja) | 1986-10-02 |
| JPH0452623B2 JPH0452623B2 (enExample) | 1992-08-24 |
Family
ID=13262876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60064599A Granted JPS61222151A (ja) | 1985-03-27 | 1985-03-27 | 半導体搭載用プリント配線板の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61222151A (enExample) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0274056A (ja) * | 1988-09-09 | 1990-03-14 | Matsushita Electric Ind Co Ltd | チップキャリア及びチップキャリアアレイ |
| JPH0567694A (ja) * | 1991-09-09 | 1993-03-19 | Nec Corp | リードレスチツプキヤリア用フレーム基板 |
| JP2000340698A (ja) * | 1999-06-01 | 2000-12-08 | New Japan Radio Co Ltd | リードレスチップキャリア用基板及びリードレスチップキャリア |
| JP2002334951A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体素子搭載用基板及び半導体パッケージ |
| JP2002334950A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージの製造法及び半導体パッケージ |
| JP2002334948A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージ、半導体素子搭載用基板及びそれらの製造方法 |
| JP2002334949A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージ及び半導体素子搭載用基板の製造方法 |
| KR100400949B1 (ko) * | 1994-12-05 | 2003-12-06 | 모토로라 인코포레이티드 | 볼-그리드어레이조립들을위한멀티-스트랜드기판및방법 |
| US6686226B1 (en) | 1994-02-10 | 2004-02-03 | Hitachi, Ltd. | Method of manufacturing a semiconductor device a ball grid array package structure using a supporting frame |
| US6746897B2 (en) | 1994-03-18 | 2004-06-08 | Naoki Fukutomi | Fabrication process of semiconductor package and semiconductor package |
| DE19802575B4 (de) * | 1997-01-25 | 2005-10-13 | LG Semicon Co., Ltd., Cheongju | Verfahren zum Herstellen einer Einheit für ein Ball-Grid-Array-Halbleiterbauteil und zum Herstellen eines Ball-Grid-Array-Halbleiterbauteils |
| CN103531554A (zh) * | 2013-08-05 | 2014-01-22 | 日月光半导体制造股份有限公司 | 半导体组件及其制造方法 |
-
1985
- 1985-03-27 JP JP60064599A patent/JPS61222151A/ja active Granted
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0274056A (ja) * | 1988-09-09 | 1990-03-14 | Matsushita Electric Ind Co Ltd | チップキャリア及びチップキャリアアレイ |
| JPH0567694A (ja) * | 1991-09-09 | 1993-03-19 | Nec Corp | リードレスチツプキヤリア用フレーム基板 |
| US6686226B1 (en) | 1994-02-10 | 2004-02-03 | Hitachi, Ltd. | Method of manufacturing a semiconductor device a ball grid array package structure using a supporting frame |
| US6861294B2 (en) | 1994-02-10 | 2005-03-01 | Renesas Technology Corp. | Semiconductor devices and methods of making the devices |
| US6746897B2 (en) | 1994-03-18 | 2004-06-08 | Naoki Fukutomi | Fabrication process of semiconductor package and semiconductor package |
| US7187072B2 (en) | 1994-03-18 | 2007-03-06 | Hitachi Chemical Company, Ltd. | Fabrication process of semiconductor package and semiconductor package |
| JP2002334949A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージ及び半導体素子搭載用基板の製造方法 |
| JP2002334948A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージ、半導体素子搭載用基板及びそれらの製造方法 |
| JP2002334950A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体パッケージの製造法及び半導体パッケージ |
| EP1213755A3 (en) * | 1994-03-18 | 2005-05-25 | Hitachi Chemical Co., Ltd. | Fabrication process of semiconductor package and semiconductor package |
| JP2002334951A (ja) * | 1994-03-18 | 2002-11-22 | Hitachi Chem Co Ltd | 半導体素子搭載用基板及び半導体パッケージ |
| US6710265B2 (en) | 1994-12-05 | 2004-03-23 | Motorola, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| KR100400949B1 (ko) * | 1994-12-05 | 2003-12-06 | 모토로라 인코포레이티드 | 볼-그리드어레이조립들을위한멀티-스트랜드기판및방법 |
| US7199306B2 (en) | 1994-12-05 | 2007-04-03 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| US7397001B2 (en) | 1994-12-05 | 2008-07-08 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| US20080289867A1 (en) * | 1994-12-05 | 2008-11-27 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| DE19802575B4 (de) * | 1997-01-25 | 2005-10-13 | LG Semicon Co., Ltd., Cheongju | Verfahren zum Herstellen einer Einheit für ein Ball-Grid-Array-Halbleiterbauteil und zum Herstellen eines Ball-Grid-Array-Halbleiterbauteils |
| JP2000340698A (ja) * | 1999-06-01 | 2000-12-08 | New Japan Radio Co Ltd | リードレスチップキャリア用基板及びリードレスチップキャリア |
| CN103531554A (zh) * | 2013-08-05 | 2014-01-22 | 日月光半导体制造股份有限公司 | 半导体组件及其制造方法 |
| CN106098661A (zh) * | 2013-08-05 | 2016-11-09 | 日月光半导体制造股份有限公司 | 半导体组件及其制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0452623B2 (enExample) | 1992-08-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |