JPS61153346U - - Google Patents
Info
- Publication number
- JPS61153346U JPS61153346U JP3556285U JP3556285U JPS61153346U JP S61153346 U JPS61153346 U JP S61153346U JP 3556285 U JP3556285 U JP 3556285U JP 3556285 U JP3556285 U JP 3556285U JP S61153346 U JPS61153346 U JP S61153346U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- convex portion
- ceramic base
- semiconductor device
- melting point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 2
- 238000002844 melting Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 238000005219 brazing Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 238000007747 plating Methods 0.000 claims 1
- 230000008018 melting Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａは本考案の一実施例の断面図、同図ｂ
は部分斜視図、第２図は従来の半導体装置の断面
図、第３図と第４図は従来の半導体装置のセラミ
ツク基体の変形の一例および他の一例を示す断面
図である。
１，１１……セラミツク基体、１ａ……底面層
、１ｂ，１ｃ……環状セラミツク層、１ｄ……底
面外周層、２……外部リード、３……低融点ガラ
ス、４……セラミツクキヤツプ、５……半導体素
子。
Figure 1a is a sectional view of one embodiment of the present invention, Figure 1b
1 is a partial perspective view, FIG. 2 is a sectional view of a conventional semiconductor device, and FIGS. 3 and 4 are sectional views showing one example of modification and another example of a ceramic substrate of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1, 11... Ceramic base, 1a... Bottom layer, 1b, 1c... Annular ceramic layer, 1d... Bottom peripheral layer, 2... External lead, 3... Low melting point glass, 4... Ceramic cap, 5 ...Semiconductor element.
Claims (1)
体素子が固着され、さらに、低融点ガラスを介し
セラミツクキヤツプが封着され、かつ、前記セラ
ミツク基体側面から底面にかけ金属メツキにより
外部リードが形成されたリードレスセラミツク半
導体装置において、前記セラミツク基体底面外周
部に凸部を有し、前記外部リードの一部が、前記
凸部上に形成されていることを特徴とするリード
レスセラミツク半導体装置。 A semiconductor element is fixed to a central recess of a ceramic base through a brazing material, a ceramic cap is further sealed through a low-melting point glass, and external leads are formed by metal plating from the sides to the bottom of the ceramic base. A leadless ceramic semiconductor device, characterized in that the ceramic substrate has a convex portion on the outer periphery of the bottom surface thereof, and a portion of the external lead is formed on the convex portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3556285U JPS61153346U (en) | 1985-03-14 | 1985-03-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3556285U JPS61153346U (en) | 1985-03-14 | 1985-03-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61153346U true JPS61153346U (en) | 1986-09-22 |
Family
ID=30539955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3556285U Pending JPS61153346U (en) | 1985-03-14 | 1985-03-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61153346U (en) |
-
1985
- 1985-03-14 JP JP3556285U patent/JPS61153346U/ja active Pending
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