JPS6146740U - Container for semiconductor devices - Google Patents

Container for semiconductor devices

Info

Publication number
JPS6146740U
JPS6146740U JP1984131608U JP13160884U JPS6146740U JP S6146740 U JPS6146740 U JP S6146740U JP 1984131608 U JP1984131608 U JP 1984131608U JP 13160884 U JP13160884 U JP 13160884U JP S6146740 U JPS6146740 U JP S6146740U
Authority
JP
Japan
Prior art keywords
container
semiconductor devices
ceramic
seal ring
metallized layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984131608U
Other languages
Japanese (ja)
Inventor
高志 木下
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP1984131608U priority Critical patent/JPS6146740U/en
Publication of JPS6146740U publication Critical patent/JPS6146740U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal

Landscapes

  • Ceramic Products (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

′ 第１図、第２図はそれぞれ本考案に基づくセラミッ
クケースの実施例を示す部分詳細断面図、第３図は従来
構造のセラミックケースの断面図。 第４図はその部分詳細断面図である。 １・・・・・・セラミック基体、２・・・・・・外部リ
ード、３・・・・・・シールリング、４・・・・・・半
導体素子、５・・・・・・キャップ、６・・・・・・タ
ングステンメタライズ層、７・・・・・・Ｎｉメッキ層
、８・・・・・・Ａｇ−Ｃｕロウ材、９・・・・・・タ
ングステンメタライズ層とセラミック基体との界面、１
０・・・・・・凹凸形状。' Figs. 1 and 2 are partially detailed cross-sectional views showing examples of the ceramic case based on the present invention, and Fig. 3 is a cross-sectional view of a ceramic case with a conventional structure. FIG. 4 is a detailed sectional view of a portion thereof. DESCRIPTION OF SYMBOLS 1...Ceramic base, 2...External lead, 3...Seal ring, 4...Semiconductor element, 5...Cap, 6 ... Tungsten metallized layer, 7 ... Ni plating layer, 8 ... Ag-Cu brazing material, 9 ... Interface between tungsten metallized layer and ceramic substrate ,1
0... Concave and convex shape.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] セラミック基板上にシールリングを有する半導体素子用
容器において、シールリング取付用メタライズ層が設け
られたセラミック面が、他のセラミック面よりも粗面で
あることを特徴とする半導体素子用容器。A container for semiconductor devices having a seal ring on a ceramic substrate, wherein a ceramic surface provided with a metallized layer for attaching the seal ring is rougher than other ceramic surfaces.
JP1984131608U 1984-08-30 1984-08-30 Container for semiconductor devices Pending JPS6146740U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984131608U JPS6146740U (en) 1984-08-30 1984-08-30 Container for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984131608U JPS6146740U (en) 1984-08-30 1984-08-30 Container for semiconductor devices

Publications (1)

Publication Number Publication Date
JPS6146740U true JPS6146740U (en) 1986-03-28

Family

ID=30690186

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984131608U Pending JPS6146740U (en) 1984-08-30 1984-08-30 Container for semiconductor devices

Country Status (1)

Country Link
JP (1) JPS6146740U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03224251A (en) * 1989-12-19 1991-10-03 Fujitsu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03224251A (en) * 1989-12-19 1991-10-03 Fujitsu Ltd Semiconductor device

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