JPS61144795A - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JPS61144795A JPS61144795A JP59267951A JP26795184A JPS61144795A JP S61144795 A JPS61144795 A JP S61144795A JP 59267951 A JP59267951 A JP 59267951A JP 26795184 A JP26795184 A JP 26795184A JP S61144795 A JPS61144795 A JP S61144795A
- Authority
- JP
- Japan
- Prior art keywords
- time
- sense
- signal
- sense amplifier
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59267951A JPS61144795A (ja) | 1984-12-17 | 1984-12-17 | 半導体記憶装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59267951A JPS61144795A (ja) | 1984-12-17 | 1984-12-17 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61144795A true JPS61144795A (ja) | 1986-07-02 |
| JPH0518197B2 JPH0518197B2 (enrdf_load_stackoverflow) | 1993-03-11 |
Family
ID=17451861
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59267951A Granted JPS61144795A (ja) | 1984-12-17 | 1984-12-17 | 半導体記憶装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61144795A (enrdf_load_stackoverflow) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004502267A (ja) * | 2000-07-07 | 2004-01-22 | モサイド・テクノロジーズ・インコーポレイテッド | アクセス待ち時間が均一な高速dramアーキテクチャ |
| JP2004503049A (ja) * | 2000-07-07 | 2004-01-29 | モサイド・テクノロジーズ・インコーポレイテッド | 行および列へのアクセス動作を同期させるための方法および装置 |
| KR100432574B1 (ko) * | 1997-06-24 | 2004-07-30 | 삼성전자주식회사 | 커플링을 막기 위한 반도체 메모리 장치 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5358736A (en) * | 1976-11-08 | 1978-05-26 | Toshiba Corp | Input/output control system for mos dynamic random access memory |
| JPS53134337A (en) * | 1977-03-25 | 1978-11-22 | Hitachi Ltd | Sense circuit |
| JPS55132595A (en) * | 1979-04-04 | 1980-10-15 | Nec Corp | Semiconductor circuit |
| JPS55146695A (en) * | 1975-12-29 | 1980-11-15 | Mostek Corp | Method and device for reading and refreshing optimum logic level of dynamic random access memory |
| JPS5746392A (en) * | 1980-09-04 | 1982-03-16 | Mitsubishi Electric Corp | Memory |
| JPS58171789A (ja) * | 1982-03-19 | 1983-10-08 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | メモリアレイ |
| JPS58194194A (ja) * | 1982-05-07 | 1983-11-12 | Hitachi Ltd | 半導体記憶装置 |
-
1984
- 1984-12-17 JP JP59267951A patent/JPS61144795A/ja active Granted
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55146695A (en) * | 1975-12-29 | 1980-11-15 | Mostek Corp | Method and device for reading and refreshing optimum logic level of dynamic random access memory |
| JPS5358736A (en) * | 1976-11-08 | 1978-05-26 | Toshiba Corp | Input/output control system for mos dynamic random access memory |
| JPS53134337A (en) * | 1977-03-25 | 1978-11-22 | Hitachi Ltd | Sense circuit |
| JPS55132595A (en) * | 1979-04-04 | 1980-10-15 | Nec Corp | Semiconductor circuit |
| JPS5746392A (en) * | 1980-09-04 | 1982-03-16 | Mitsubishi Electric Corp | Memory |
| JPS58171789A (ja) * | 1982-03-19 | 1983-10-08 | エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン | メモリアレイ |
| JPS58194194A (ja) * | 1982-05-07 | 1983-11-12 | Hitachi Ltd | 半導体記憶装置 |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100432574B1 (ko) * | 1997-06-24 | 2004-07-30 | 삼성전자주식회사 | 커플링을 막기 위한 반도체 메모리 장치 |
| JP2004502267A (ja) * | 2000-07-07 | 2004-01-22 | モサイド・テクノロジーズ・インコーポレイテッド | アクセス待ち時間が均一な高速dramアーキテクチャ |
| JP2004503049A (ja) * | 2000-07-07 | 2004-01-29 | モサイド・テクノロジーズ・インコーポレイテッド | 行および列へのアクセス動作を同期させるための方法および装置 |
| US7957211B2 (en) | 2000-07-07 | 2011-06-07 | Mosaid Technologies Incorporation | Method and apparatus for synchronization of row and column access operations |
| US8045413B2 (en) | 2000-07-07 | 2011-10-25 | Mosaid Technologies Incorporated | High speed DRAM architecture with uniform access latency |
| JP2012164416A (ja) * | 2000-07-07 | 2012-08-30 | Mosaid Technologies Inc | 行および列へのアクセス動作を同期させるための方法および装置 |
| US8503250B2 (en) | 2000-07-07 | 2013-08-06 | Mosaid Technologies Incorporated | High speed DRAM architecture with uniform access latency |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0518197B2 (enrdf_load_stackoverflow) | 1993-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
| R360 | Written notification for declining of transfer of rights |
Free format text: JAPANESE INTERMEDIATE CODE: R360 |
|
| R360 | Written notification for declining of transfer of rights |
Free format text: JAPANESE INTERMEDIATE CODE: R360 |
|
| R371 | Transfer withdrawn |
Free format text: JAPANESE INTERMEDIATE CODE: R371 |
|
| EXPY | Cancellation because of completion of term |