JPS61127243A - ビツト位相同期回路 - Google Patents

ビツト位相同期回路

Info

Publication number
JPS61127243A
JPS61127243A JP59248123A JP24812384A JPS61127243A JP S61127243 A JPS61127243 A JP S61127243A JP 59248123 A JP59248123 A JP 59248123A JP 24812384 A JP24812384 A JP 24812384A JP S61127243 A JPS61127243 A JP S61127243A
Authority
JP
Japan
Prior art keywords
clock
circuit
change point
input signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59248123A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0584692B2 (enrdf_load_stackoverflow
Inventor
Eiichi Amada
天田　栄一
Masaru Shibukawa
渋川　勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59248123A priority Critical patent/JPS61127243A/ja
Publication of JPS61127243A publication Critical patent/JPS61127243A/ja
Publication of JPH0584692B2 publication Critical patent/JPH0584692B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59248123A 1984-11-26 1984-11-26 ビツト位相同期回路 Granted JPS61127243A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59248123A JPS61127243A (ja) 1984-11-26 1984-11-26 ビツト位相同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59248123A JPS61127243A (ja) 1984-11-26 1984-11-26 ビツト位相同期回路

Publications (2)

Publication Number Publication Date
JPS61127243A true JPS61127243A (ja) 1986-06-14
JPH0584692B2 JPH0584692B2 (enrdf_load_stackoverflow) 1993-12-02

Family

ID=17173571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59248123A Granted JPS61127243A (ja) 1984-11-26 1984-11-26 ビツト位相同期回路

Country Status (1)

Country Link
JP (1) JPS61127243A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63173434A (ja) * 1987-01-13 1988-07-18 Mitsubishi Electric Corp ビツト位相同期回路
JPS63311828A (ja) * 1987-06-15 1988-12-20 Oki Electric Ind Co Ltd ディジタル位相同期回路
JPH01117440A (ja) * 1987-10-30 1989-05-10 Kenwood Corp データ受信装置の最適クロック形成装置
JPH01151098A (ja) * 1987-12-09 1989-06-13 Agency Of Ind Science & Technol サンプリング回路
JPH0265541A (ja) * 1988-08-31 1990-03-06 Sharp Corp タイミング再生回路
US6002731A (en) * 1996-12-25 1999-12-14 Nec Corporation Received-data bit synchronization circuit
JP2004509510A (ja) * 2000-09-13 2004-03-25 マルコニ　コミュニケイションズ　リミテッド データ同期化方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5963835A (ja) * 1982-10-04 1984-04-11 Hitachi Ltd ビツト同期回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5963835A (ja) * 1982-10-04 1984-04-11 Hitachi Ltd ビツト同期回路

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63173434A (ja) * 1987-01-13 1988-07-18 Mitsubishi Electric Corp ビツト位相同期回路
JPS63311828A (ja) * 1987-06-15 1988-12-20 Oki Electric Ind Co Ltd ディジタル位相同期回路
JPH01117440A (ja) * 1987-10-30 1989-05-10 Kenwood Corp データ受信装置の最適クロック形成装置
JPH01151098A (ja) * 1987-12-09 1989-06-13 Agency Of Ind Science & Technol サンプリング回路
JPH0265541A (ja) * 1988-08-31 1990-03-06 Sharp Corp タイミング再生回路
US6002731A (en) * 1996-12-25 1999-12-14 Nec Corporation Received-data bit synchronization circuit
JP2004509510A (ja) * 2000-09-13 2004-03-25 マルコニ　コミュニケイションズ　リミテッド データ同期化方法

Also Published As

Publication number Publication date
JPH0584692B2 (enrdf_load_stackoverflow) 1993-12-02

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term