JPS6098655A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6098655A
JPS6098655A JP58206414A JP20641483A JPS6098655A JP S6098655 A JPS6098655 A JP S6098655A JP 58206414 A JP58206414 A JP 58206414A JP 20641483 A JP20641483 A JP 20641483A JP S6098655 A JPS6098655 A JP S6098655A
Authority
JP
Japan
Prior art keywords
insulating layer
wiring
vertical
semiconductor device
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58206414A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0447980B2 (index.php
Inventor
Tadayoshi Enomoto
榎本　忠儀
Masaaki Yasumoto
安本　雅昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58206414A priority Critical patent/JPS6098655A/ja
Publication of JPS6098655A publication Critical patent/JPS6098655A/ja
Publication of JPH0447980B2 publication Critical patent/JPH0447980B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W90/00—
    • H10W72/07251—
    • H10W72/20—
    • H10W90/297—
    • H10W90/722—

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP58206414A 1983-11-02 1983-11-02 半導体装置 Granted JPS6098655A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58206414A JPS6098655A (ja) 1983-11-02 1983-11-02 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58206414A JPS6098655A (ja) 1983-11-02 1983-11-02 半導体装置

Publications (2)

Publication Number Publication Date
JPS6098655A true JPS6098655A (ja) 1985-06-01
JPH0447980B2 JPH0447980B2 (index.php) 1992-08-05

Family

ID=16522969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58206414A Granted JPS6098655A (ja) 1983-11-02 1983-11-02 半導体装置

Country Status (1)

Country Link
JP (1) JPS6098655A (index.php)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4982266A (en) * 1987-12-23 1991-01-01 Texas Instruments Incorporated Integrated circuit with metal interconnecting layers above and below active circuitry
US5091762A (en) * 1988-07-05 1992-02-25 Kabushiki Kaisha Toshiba Semiconductor memory device with a 3-dimensional structure
US5391917A (en) * 1993-05-10 1995-02-21 International Business Machines Corporation Multiprocessor module packaging
JPH09506797A (ja) * 1993-12-22 1997-07-08 エイ． レディンハム，ブレイク 交換可能なブリスルパックを有する塗装用刷毛
JPH11261001A (ja) * 1998-03-13 1999-09-24 Japan Science & Technology Corp ３次元半導体集積回路装置の製造方法
US7029937B2 (en) * 2002-03-19 2006-04-18 Seiko Epson Corporation Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
US7335517B2 (en) * 1996-12-02 2008-02-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
JP2008270797A (ja) * 1992-04-08 2008-11-06 Glenn J Leedy 絶縁膜層分離ｉｃ製造

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4982266A (en) * 1987-12-23 1991-01-01 Texas Instruments Incorporated Integrated circuit with metal interconnecting layers above and below active circuitry
US5091762A (en) * 1988-07-05 1992-02-25 Kabushiki Kaisha Toshiba Semiconductor memory device with a 3-dimensional structure
JP2008270797A (ja) * 1992-04-08 2008-11-06 Glenn J Leedy 絶縁膜層分離ｉｃ製造
JP2009218606A (ja) * 1992-04-08 2009-09-24 Taiwan Semiconductor Manufacturing Co Ltd 絶縁膜層分離ｉｃ製造
US5391917A (en) * 1993-05-10 1995-02-21 International Business Machines Corporation Multiprocessor module packaging
JPH09506797A (ja) * 1993-12-22 1997-07-08 エイ． レディンハム，ブレイク 交換可能なブリスルパックを有する塗装用刷毛
US7335517B2 (en) * 1996-12-02 2008-02-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US7829975B2 (en) 1996-12-02 2010-11-09 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US8174093B2 (en) 1996-12-02 2012-05-08 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US8283755B2 (en) 1996-12-02 2012-10-09 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
JPH11261001A (ja) * 1998-03-13 1999-09-24 Japan Science & Technology Corp ３次元半導体集積回路装置の製造方法
US7029937B2 (en) * 2002-03-19 2006-04-18 Seiko Epson Corporation Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

Also Published As

Publication number Publication date
JPH0447980B2 (index.php) 1992-08-05

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