JPS6091656A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS6091656A JPS6091656A JP58199369A JP19936983A JPS6091656A JP S6091656 A JPS6091656 A JP S6091656A JP 58199369 A JP58199369 A JP 58199369A JP 19936983 A JP19936983 A JP 19936983A JP S6091656 A JPS6091656 A JP S6091656A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- semiconductor element
- electrode
- bonding
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58199369A JPS6091656A (ja) | 1983-10-25 | 1983-10-25 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58199369A JPS6091656A (ja) | 1983-10-25 | 1983-10-25 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6091656A true JPS6091656A (ja) | 1985-05-23 |
| JPS644342B2 JPS644342B2 (enrdf_load_stackoverflow) | 1989-01-25 |
Family
ID=16406607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58199369A Granted JPS6091656A (ja) | 1983-10-25 | 1983-10-25 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6091656A (enrdf_load_stackoverflow) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6290937A (ja) * | 1985-10-17 | 1987-04-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JPH01146337A (ja) * | 1987-12-03 | 1989-06-08 | Matsushita Electric Ind Co Ltd | 半導体の組立方法 |
| US5456003A (en) * | 1992-06-18 | 1995-10-10 | Matsushita Electric Industrial Co., Ltd. | Method for packaging a semiconductor device having projected electrodes |
-
1983
- 1983-10-25 JP JP58199369A patent/JPS6091656A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6290937A (ja) * | 1985-10-17 | 1987-04-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JPH01146337A (ja) * | 1987-12-03 | 1989-06-08 | Matsushita Electric Ind Co Ltd | 半導体の組立方法 |
| US5456003A (en) * | 1992-06-18 | 1995-10-10 | Matsushita Electric Industrial Co., Ltd. | Method for packaging a semiconductor device having projected electrodes |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS644342B2 (enrdf_load_stackoverflow) | 1989-01-25 |
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