JPS607678A - メモリ構成方式 - Google Patents

メモリ構成方式

Info

Publication number
JPS607678A
JPS607678A JP58114884A JP11488483A JPS607678A JP S607678 A JPS607678 A JP S607678A JP 58114884 A JP58114884 A JP 58114884A JP 11488483 A JP11488483 A JP 11488483A JP S607678 A JPS607678 A JP S607678A
Authority
JP
Japan
Prior art keywords
data
address
bit
location
storage element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58114884A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0120511B2 (enrdf_load_stackoverflow
Inventor
Akira Jinzaki
明 陣崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58114884A priority Critical patent/JPS607678A/ja
Publication of JPS607678A publication Critical patent/JPS607678A/ja
Publication of JPH0120511B2 publication Critical patent/JPH0120511B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
JP58114884A 1983-06-25 1983-06-25 メモリ構成方式 Granted JPS607678A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58114884A JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58114884A JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Publications (2)

Publication Number Publication Date
JPS607678A true JPS607678A (ja) 1985-01-16
JPH0120511B2 JPH0120511B2 (enrdf_load_stackoverflow) 1989-04-17

Family

ID=14649079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58114884A Granted JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Country Status (1)

Country Link
JP (1) JPS607678A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62102497A (ja) * 1985-10-28 1987-05-12 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション ランダム・アクセス・メモリ
JPS63163549A (ja) * 1986-12-25 1988-07-07 Sony Corp ビツトブロツクの転送方法
JPH02161519A (ja) * 1988-04-14 1990-06-21 Nec Corp シリアル入出力回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817582A (ja) * 1981-07-06 1983-02-01 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 多重ワ−ド・メモリのデ−タ蓄積およびアドレス指定方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817582A (ja) * 1981-07-06 1983-02-01 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 多重ワ−ド・メモリのデ−タ蓄積およびアドレス指定方式

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62102497A (ja) * 1985-10-28 1987-05-12 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション ランダム・アクセス・メモリ
JPS63163549A (ja) * 1986-12-25 1988-07-07 Sony Corp ビツトブロツクの転送方法
JPH02161519A (ja) * 1988-04-14 1990-06-21 Nec Corp シリアル入出力回路

Also Published As

Publication number Publication date
JPH0120511B2 (enrdf_load_stackoverflow) 1989-04-17

Similar Documents

Publication Publication Date Title
EP0225059B1 (en) Semiconductor memory
JPH0420492B2 (enrdf_load_stackoverflow)
JPS61161562A (ja) 階層メモリ・システム
US5095422A (en) Information transferring method and apparatus for transferring information from one memory area to another memory area
GB1108803A (en) Address selection control apparatus
JPH09167495A (ja) データ記憶ユニット及び該ユニットを用いたデータ記憶装置
KR890002773A (ko) 디지탈 비데오 신호의 기억 장치 및 그 방법
JPS61271548A (ja) プロセツサ−を高容量記憶装置に接続するための電子回路
JPS607678A (ja) メモリ構成方式
JPS592079A (ja) 画像記憶装置
US5530934A (en) Dynamic memory address line decoding
JPH0792734B2 (ja) メモリ装置
JPS61235969A (ja) メモリ装置
JPH0120514B2 (enrdf_load_stackoverflow)
JPH0754544B2 (ja) イメ−ジメモリのアクセス回路
JPH0227759B2 (enrdf_load_stackoverflow)
JPH0233158B2 (enrdf_load_stackoverflow)
JPS6292051A (ja) メモリ装置
JPS60254477A (ja) メモリシステム
JPS6232818B2 (enrdf_load_stackoverflow)
JPS60140445A (ja) 三次元メモリのアドレス制御方法
JPH0444356B2 (enrdf_load_stackoverflow)
JPS62146480A (ja) 半導体記憶装置
JPH04171549A (ja) メモリシステムの高速読出し方法
JPH03204049A (ja) メモリ制御装置