JPS6074628A - 配線パタ−ンの形成方法 - Google Patents

配線パタ−ンの形成方法

Info

Publication number
JPS6074628A
JPS6074628A JP58182099A JP18209983A JPS6074628A JP S6074628 A JPS6074628 A JP S6074628A JP 58182099 A JP58182099 A JP 58182099A JP 18209983 A JP18209983 A JP 18209983A JP S6074628 A JPS6074628 A JP S6074628A
Authority
JP
Japan
Prior art keywords
wiring pattern
forming
conductor layer
layer
photoresist layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58182099A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0437577B2 (cg-RX-API-DMAC7.html
Inventor
Yoshitaka Fukuoka
義孝 福岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58182099A priority Critical patent/JPS6074628A/ja
Publication of JPS6074628A publication Critical patent/JPS6074628A/ja
Publication of JPH0437577B2 publication Critical patent/JPH0437577B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
JP58182099A 1983-09-30 1983-09-30 配線パタ−ンの形成方法 Granted JPS6074628A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58182099A JPS6074628A (ja) 1983-09-30 1983-09-30 配線パタ−ンの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58182099A JPS6074628A (ja) 1983-09-30 1983-09-30 配線パタ−ンの形成方法

Publications (2)

Publication Number Publication Date
JPS6074628A true JPS6074628A (ja) 1985-04-26
JPH0437577B2 JPH0437577B2 (cg-RX-API-DMAC7.html) 1992-06-19

Family

ID=16112324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58182099A Granted JPS6074628A (ja) 1983-09-30 1983-09-30 配線パタ−ンの形成方法

Country Status (1)

Country Link
JP (1) JPS6074628A (cg-RX-API-DMAC7.html)

Also Published As

Publication number Publication date
JPH0437577B2 (cg-RX-API-DMAC7.html) 1992-06-19

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