JPS6060736A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JPS6060736A
JPS6060736A JP16826783A JP16826783A JPS6060736A JP S6060736 A JPS6060736 A JP S6060736A JP 16826783 A JP16826783 A JP 16826783A JP 16826783 A JP16826783 A JP 16826783A JP S6060736 A JPS6060736 A JP S6060736A
Authority
JP
Japan
Prior art keywords
film
substrate
main surface
oxide film
oxidation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16826783A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0420267B2 (de
Inventor
Akira Kawakatsu
川勝 章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP16826783A priority Critical patent/JPS6060736A/ja
Publication of JPS6060736A publication Critical patent/JPS6060736A/ja
Publication of JPH0420267B2 publication Critical patent/JPH0420267B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76221Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
JP16826783A 1983-09-14 1983-09-14 半導体集積回路装置の製造方法 Granted JPS6060736A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16826783A JPS6060736A (ja) 1983-09-14 1983-09-14 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16826783A JPS6060736A (ja) 1983-09-14 1983-09-14 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6060736A true JPS6060736A (ja) 1985-04-08
JPH0420267B2 JPH0420267B2 (de) 1992-04-02

Family

ID=15864843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16826783A Granted JPS6060736A (ja) 1983-09-14 1983-09-14 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6060736A (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0230160A (ja) * 1988-07-19 1990-01-31 Nec Corp 半導体装置
JPH11289006A (ja) * 1998-03-02 1999-10-19 Samsung Electronics Co Ltd 集積回路にトレンチアイソレ―ションを形成する方法
US8774367B2 (en) 2008-10-22 2014-07-08 Koninklijke Philips N.V. Bearing within an X-ray tube

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0230160A (ja) * 1988-07-19 1990-01-31 Nec Corp 半導体装置
JPH11289006A (ja) * 1998-03-02 1999-10-19 Samsung Electronics Co Ltd 集積回路にトレンチアイソレ―ションを形成する方法
US8774367B2 (en) 2008-10-22 2014-07-08 Koninklijke Philips N.V. Bearing within an X-ray tube

Also Published As

Publication number Publication date
JPH0420267B2 (de) 1992-04-02

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