JPS6029786A - メモリ制御方式 - Google Patents

メモリ制御方式

Info

Publication number
JPS6029786A
JPS6029786A JP58138260A JP13826083A JPS6029786A JP S6029786 A JPS6029786 A JP S6029786A JP 58138260 A JP58138260 A JP 58138260A JP 13826083 A JP13826083 A JP 13826083A JP S6029786 A JPS6029786 A JP S6029786A
Authority
JP
Japan
Prior art keywords
memory
signal
data
address
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58138260A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0118430B2 (enrdf_load_stackoverflow
Inventor
久保　健吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58138260A priority Critical patent/JPS6029786A/ja
Publication of JPS6029786A publication Critical patent/JPS6029786A/ja
Publication of JPH0118430B2 publication Critical patent/JPH0118430B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Input (AREA)
  • Digital Computer Display Output (AREA)
JP58138260A 1983-07-28 1983-07-28 メモリ制御方式 Granted JPS6029786A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58138260A JPS6029786A (ja) 1983-07-28 1983-07-28 メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58138260A JPS6029786A (ja) 1983-07-28 1983-07-28 メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS6029786A true JPS6029786A (ja) 1985-02-15
JPH0118430B2 JPH0118430B2 (enrdf_load_stackoverflow) 1989-04-05

Family

ID=15217779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58138260A Granted JPS6029786A (ja) 1983-07-28 1983-07-28 メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS6029786A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62249283A (ja) * 1986-04-23 1987-10-30 Casio Comput Co Ltd 動的メモリ駆動回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62249283A (ja) * 1986-04-23 1987-10-30 Casio Comput Co Ltd 動的メモリ駆動回路

Also Published As

Publication number Publication date
JPH0118430B2 (enrdf_load_stackoverflow) 1989-04-05

Similar Documents

Publication Publication Date Title
KR970011222B1 (ko) 비데오 랜덤 액세스 메모리(vram) 액서스 회로 및 방법
JPH0238975B2 (enrdf_load_stackoverflow)
US4570222A (en) Information processor having information correcting function
JPS6029786A (ja) メモリ制御方式
JPS6120889B2 (enrdf_load_stackoverflow)
KR100275427B1 (ko) Ram과의 인터페이스 방법 및 장치
US5055717A (en) Data selector circuit and method of selecting format of data output from plural registers
JPS6226548A (ja) メモリ制御装置
JPH0259560B2 (enrdf_load_stackoverflow)
JPS60260086A (ja) メモリ回路
JP2901631B2 (ja) 画像処理装置
JPS607676A (ja) メモリ書込み回路
JPS5981689A (ja) 表示装置
JP3526542B2 (ja) データ転送装置及びその方法
JP2833902B2 (ja) ビットマップ表示装置の表示アトリビュート制御回路
JPS61112270A (ja) バイト変換装置
JPH0831271B2 (ja) メモリ
JPS60176089A (ja) Ｃｒｔビデオメモリのアクセス制御方式
JPS59225451A (ja) マイクロプログラム制御装置
JPS61143835A (ja) デ−タ表示方式
JPS60249181A (ja) 情報処理装置
JPH04225453A (ja) データ処理装置
JPH0630073B2 (ja) メモリ装置
JPS58195230A (ja) チヤネル制御装置
JPS58134685A (ja) グラフイツクデイスプレイ装置