JPS60246644A - ワイヤボンデイング方法およびその装置 - Google Patents

ワイヤボンデイング方法およびその装置

Info

Publication number
JPS60246644A
JPS60246644A JP59101735A JP10173584A JPS60246644A JP S60246644 A JPS60246644 A JP S60246644A JP 59101735 A JP59101735 A JP 59101735A JP 10173584 A JP10173584 A JP 10173584A JP S60246644 A JPS60246644 A JP S60246644A
Authority
JP
Japan
Prior art keywords
bonding
axis
computer
memory
wire bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59101735A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0527253B2 (enExample
Inventor
Michitaka Yonezawa
米沢　通孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59101735A priority Critical patent/JPS60246644A/ja
Publication of JPS60246644A publication Critical patent/JPS60246644A/ja
Publication of JPH0527253B2 publication Critical patent/JPH0527253B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP59101735A 1984-05-22 1984-05-22 ワイヤボンデイング方法およびその装置 Granted JPS60246644A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59101735A JPS60246644A (ja) 1984-05-22 1984-05-22 ワイヤボンデイング方法およびその装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59101735A JPS60246644A (ja) 1984-05-22 1984-05-22 ワイヤボンデイング方法およびその装置

Publications (2)

Publication Number Publication Date
JPS60246644A true JPS60246644A (ja) 1985-12-06
JPH0527253B2 JPH0527253B2 (enExample) 1993-04-20

Family

ID=14308511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59101735A Granted JPS60246644A (ja) 1984-05-22 1984-05-22 ワイヤボンデイング方法およびその装置

Country Status (1)

Country Link
JP (1) JPS60246644A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060843A (en) * 1989-06-07 1991-10-29 Nec Corporation Process of forming bump on electrode of semiconductor chip and apparatus used therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060843A (en) * 1989-06-07 1991-10-29 Nec Corporation Process of forming bump on electrode of semiconductor chip and apparatus used therefor

Also Published As

Publication number Publication date
JPH0527253B2 (enExample) 1993-04-20

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