JPS60107845A - 半導体用回路基板 - Google Patents

半導体用回路基板

Info

Publication number
JPS60107845A
JPS60107845A JP21669883A JP21669883A JPS60107845A JP S60107845 A JPS60107845 A JP S60107845A JP 21669883 A JP21669883 A JP 21669883A JP 21669883 A JP21669883 A JP 21669883A JP S60107845 A JPS60107845 A JP S60107845A
Authority
JP
Japan
Prior art keywords
copper foil
bonding
nickel
circuit board
semiconductor circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21669883A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0454378B2 (enrdf_load_stackoverflow
Inventor
Nobuyuki Mizunoya
水野谷　信幸
Yasuyuki Sugiura
杉浦　康之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP21669883A priority Critical patent/JPS60107845A/ja
Publication of JPS60107845A publication Critical patent/JPS60107845A/ja
Publication of JPH0454378B2 publication Critical patent/JPH0454378B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP21669883A 1983-11-17 1983-11-17 半導体用回路基板 Granted JPS60107845A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21669883A JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21669883A JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Publications (2)

Publication Number Publication Date
JPS60107845A true JPS60107845A (ja) 1985-06-13
JPH0454378B2 JPH0454378B2 (enrdf_load_stackoverflow) 1992-08-31

Family

ID=16692514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21669883A Granted JPS60107845A (ja) 1983-11-17 1983-11-17 半導体用回路基板

Country Status (1)

Country Link
JP (1) JPS60107845A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0607929A3 (en) * 1993-01-19 1996-03-13 Canon Kk Flexible printed circuit board and ink jet recording head using the same.
EP0966186A3 (de) * 1998-06-19 2001-08-16 Jürgen Dr.-Ing. Schulz-Harder Verfahren zum Herstellen eines Metall-Keramik-Substrates
US7288437B2 (en) 1986-12-24 2007-10-30 Semiconductor Energy Laboratory Co., Ltd. Conductive pattern producing method and its applications

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3766634A (en) * 1972-04-20 1973-10-23 Gen Electric Method of direct bonding metals to non-metallic substrates
JPS56167339A (en) * 1980-05-26 1981-12-23 Takehiko Yasuda Electronic parts equipped with gold conductive layer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3766634A (en) * 1972-04-20 1973-10-23 Gen Electric Method of direct bonding metals to non-metallic substrates
JPS56167339A (en) * 1980-05-26 1981-12-23 Takehiko Yasuda Electronic parts equipped with gold conductive layer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7288437B2 (en) 1986-12-24 2007-10-30 Semiconductor Energy Laboratory Co., Ltd. Conductive pattern producing method and its applications
EP0607929A3 (en) * 1993-01-19 1996-03-13 Canon Kk Flexible printed circuit board and ink jet recording head using the same.
US6328427B1 (en) 1993-01-19 2001-12-11 Canon Kabushiki Kaisha Method of producing a wiring substrate
EP0966186A3 (de) * 1998-06-19 2001-08-16 Jürgen Dr.-Ing. Schulz-Harder Verfahren zum Herstellen eines Metall-Keramik-Substrates

Also Published As

Publication number Publication date
JPH0454378B2 (enrdf_load_stackoverflow) 1992-08-31

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