JPS5982746A - 半導体装置の電極配線方法 - Google Patents
半導体装置の電極配線方法Info
- Publication number
- JPS5982746A JPS5982746A JP57192491A JP19249182A JPS5982746A JP S5982746 A JPS5982746 A JP S5982746A JP 57192491 A JP57192491 A JP 57192491A JP 19249182 A JP19249182 A JP 19249182A JP S5982746 A JPS5982746 A JP S5982746A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrode wiring
- etching
- layers
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57192491A JPS5982746A (ja) | 1982-11-04 | 1982-11-04 | 半導体装置の電極配線方法 |
US06/548,440 US4520041A (en) | 1982-11-04 | 1983-11-03 | Method for forming metallization structure having flat surface on semiconductor substrate |
DE19833339957 DE3339957A1 (de) | 1982-11-04 | 1983-11-04 | Verfahren zur herstellung eines halbleiterbauelementes |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57192491A JPS5982746A (ja) | 1982-11-04 | 1982-11-04 | 半導体装置の電極配線方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5982746A true JPS5982746A (ja) | 1984-05-12 |
Family
ID=16292184
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57192491A Pending JPS5982746A (ja) | 1982-11-04 | 1982-11-04 | 半導体装置の電極配線方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4520041A (US07709020-20100504-C00068.png) |
JP (1) | JPS5982746A (US07709020-20100504-C00068.png) |
DE (1) | DE3339957A1 (US07709020-20100504-C00068.png) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63278351A (ja) * | 1987-05-11 | 1988-11-16 | Nec Corp | 集積回路の製造方法 |
JPH02141737A (ja) * | 1988-11-24 | 1990-05-31 | Canon Inc | 背面投射型スクリーン及びそれを用いた背面投射型画像表示装置 |
Families Citing this family (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60115245A (ja) * | 1983-11-28 | 1985-06-21 | Toshiba Corp | 半導体装置の製造方法 |
JPS60138940A (ja) * | 1983-12-27 | 1985-07-23 | Toshiba Corp | 半導体装置の製造方法 |
FR2563048B1 (fr) * | 1984-04-13 | 1986-05-30 | Efcis | Procede de realisation de contacts d'aluminium a travers une couche isolante epaisse dans un circuit integre |
FR2566181B1 (fr) * | 1984-06-14 | 1986-08-22 | Commissariat Energie Atomique | Procede d'autopositionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre |
US4708767A (en) * | 1984-10-05 | 1987-11-24 | Signetics Corporation | Method for providing a semiconductor device with planarized contacts |
US4715109A (en) * | 1985-06-12 | 1987-12-29 | Texas Instruments Incorporated | Method of forming a high density vertical stud titanium silicide for reachup contact applications |
GB2186424A (en) * | 1986-01-30 | 1987-08-12 | Plessey Co Plc | Method for producing integrated circuit interconnects |
EP0234407A1 (en) * | 1986-02-28 | 1987-09-02 | General Electric Company | Method filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures |
US4824802A (en) * | 1986-02-28 | 1989-04-25 | General Electric Company | Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures |
DE3627417A1 (de) * | 1986-08-13 | 1988-02-18 | Siemens Ag | Verfahren zum herstellen von niederohmigen verbindungen in der isolationsschicht zwischen zwei metallisierungsebenen |
CA1306072C (en) * | 1987-03-30 | 1992-08-04 | John E. Cronin | Refractory metal - titanium nitride conductive structures and processes for forming the same |
US4735679A (en) * | 1987-03-30 | 1988-04-05 | International Business Machines Corporation | Method of improving silicon-on-insulator uniformity |
JP2557898B2 (ja) * | 1987-07-31 | 1996-11-27 | 株式会社東芝 | 半導体装置 |
US4956313A (en) * | 1987-08-17 | 1990-09-11 | International Business Machines Corporation | Via-filling and planarization technique |
US4879257A (en) * | 1987-11-18 | 1989-11-07 | Lsi Logic Corporation | Planarization process |
US4986878A (en) * | 1988-07-19 | 1991-01-22 | Cypress Semiconductor Corp. | Process for improved planarization of the passivation layers for semiconductor devices |
US4855252A (en) * | 1988-08-22 | 1989-08-08 | International Business Machines Corporation | Process for making self-aligned contacts |
US5008730A (en) * | 1988-10-03 | 1991-04-16 | International Business Machines Corporation | Contact stud structure for semiconductor devices |
US5112776A (en) * | 1988-11-10 | 1992-05-12 | Applied Materials, Inc. | Method for planarizing an integrated circuit structure using low melting inorganic material and flowing while depositing |
GB8907898D0 (en) * | 1989-04-07 | 1989-05-24 | Inmos Ltd | Semiconductor devices and fabrication thereof |
US5256565A (en) * | 1989-05-08 | 1993-10-26 | The United States Of America As Represented By The United States Department Of Energy | Electrochemical planarization |
FR2650472A1 (fr) * | 1989-07-27 | 1991-02-01 | Bull Sa | Procede de depot d'une couche isolante sur une couche conductrice du reseau multicouche d'une carte de connexion de circuit integre de haute densite, et carte en resultant |
US4939105A (en) * | 1989-08-03 | 1990-07-03 | Micron Technology, Inc. | Planarizing contact etch |
JPH0414831A (ja) * | 1990-05-08 | 1992-01-20 | Sony Corp | 配線形成方法 |
US5094712A (en) * | 1990-10-09 | 1992-03-10 | Micron Technology, Inc. | One chamber in-situ etch process for oxide and conductive material |
US5413966A (en) * | 1990-12-20 | 1995-05-09 | Lsi Logic Corporation | Shallow trench etch |
US5290396A (en) * | 1991-06-06 | 1994-03-01 | Lsi Logic Corporation | Trench planarization techniques |
US5137597A (en) * | 1991-04-11 | 1992-08-11 | Microelectronics And Computer Technology Corporation | Fabrication of metal pillars in an electronic component using polishing |
US5248625A (en) * | 1991-06-06 | 1993-09-28 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5252503A (en) * | 1991-06-06 | 1993-10-12 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5225358A (en) * | 1991-06-06 | 1993-07-06 | Lsi Logic Corporation | Method of forming late isolation with polishing |
IT1252056B (it) | 1991-11-22 | 1995-05-29 | St Microelectronics Srl | Procedimento per la realizzazione di contatti metallici ad alta stabilita' in un circuito integrato ad uno o piu' livelli di metallizzazione |
US5217926A (en) * | 1992-01-23 | 1993-06-08 | Micron Technology, Inc. | Method of passivating a semiconductor wafer |
US5300813A (en) * | 1992-02-26 | 1994-04-05 | International Business Machines Corporation | Refractory metal capped low resistivity metal conductor lines and vias |
US5858547A (en) * | 1994-07-06 | 1999-01-12 | Alliedsignal, Inc. | Novolac polymer planarization films for microelectronic structures |
US5550405A (en) * | 1994-12-21 | 1996-08-27 | Advanced Micro Devices, Incorporated | Processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ICS |
US5527736A (en) * | 1995-04-03 | 1996-06-18 | Taiwan Semiconductor Manufacturing Co. | Dimple-free tungsten etching back process |
US5591673A (en) * | 1995-07-05 | 1997-01-07 | Taiwan Semiconductor Manufacturing Company Ltd. | Tungsten stud process for stacked via applications |
US5661085A (en) * | 1996-06-17 | 1997-08-26 | Chartered Semiconductor Manufacturing Pte, Ltd. | Method for forming a low contact leakage and low contact resistance integrated circuit device electrode |
US5981385A (en) * | 1997-01-27 | 1999-11-09 | Taiwan Semiconductor Manufacturing Company Ltd. | Dimple elimination in a tungsten etch back process by reverse image patterning |
US6334249B2 (en) | 1997-04-22 | 2002-01-01 | Texas Instruments Incorporated | Cavity-filling method for reducing surface topography and roughness |
JPH1140664A (ja) * | 1997-07-17 | 1999-02-12 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US6177360B1 (en) * | 1997-11-06 | 2001-01-23 | International Business Machines Corporation | Process for manufacture of integrated circuit device |
MY139405A (en) * | 1998-09-28 | 2009-09-30 | Ibiden Co Ltd | Printed circuit board and method for its production |
CN103337501B (zh) * | 2013-06-24 | 2015-11-25 | 深圳市华星光电技术有限公司 | 阵列基板及其制作方法、平板显示装置 |
US9423247B2 (en) * | 2014-06-18 | 2016-08-23 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Positioning graphic component for substrate detection and method of manufacturing the same |
TWI642334B (zh) | 2017-10-25 | 2018-11-21 | 欣興電子股份有限公司 | 電路板及其製造方法 |
TWI642333B (zh) * | 2017-10-25 | 2018-11-21 | 欣興電子股份有限公司 | 電路板及其製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1286737A (en) * | 1969-10-15 | 1972-08-23 | Itt | Multilevel conductive systems |
FR2119930B1 (US07709020-20100504-C00068.png) * | 1970-12-31 | 1974-08-19 | Ibm | |
JPS4960870A (US07709020-20100504-C00068.png) * | 1972-10-16 | 1974-06-13 | ||
JPS5811736B2 (ja) * | 1974-10-15 | 1983-03-04 | 日本電気株式会社 | ハンドウタイソウチ |
DE2547792C3 (de) * | 1974-10-25 | 1978-08-31 | Hitachi, Ltd., Tokio | Verfahren zur Herstellung eines Halbleiterbauelementes |
US3985597A (en) * | 1975-05-01 | 1976-10-12 | International Business Machines Corporation | Process for forming passivated metal interconnection system with a planar surface |
JPS5425178A (en) * | 1977-07-27 | 1979-02-24 | Fujitsu Ltd | Manufacture for semiconductor device |
EP0019391B1 (en) * | 1979-05-12 | 1982-10-06 | Fujitsu Limited | Improvement in method of manufacturing electronic device having multilayer wiring structure |
JPS56140648A (en) * | 1980-04-04 | 1981-11-04 | Hitachi Ltd | Semiconductor integrated circuit device |
JPS5756948A (en) * | 1980-09-22 | 1982-04-05 | Toshiba Corp | Manufacture of semiconductor device |
-
1982
- 1982-11-04 JP JP57192491A patent/JPS5982746A/ja active Pending
-
1983
- 1983-11-03 US US06/548,440 patent/US4520041A/en not_active Expired - Lifetime
- 1983-11-04 DE DE19833339957 patent/DE3339957A1/de active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63278351A (ja) * | 1987-05-11 | 1988-11-16 | Nec Corp | 集積回路の製造方法 |
JPH02141737A (ja) * | 1988-11-24 | 1990-05-31 | Canon Inc | 背面投射型スクリーン及びそれを用いた背面投射型画像表示装置 |
Also Published As
Publication number | Publication date |
---|---|
US4520041A (en) | 1985-05-28 |
DE3339957C2 (US07709020-20100504-C00068.png) | 1991-05-29 |
DE3339957A1 (de) | 1984-07-12 |
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