JPS5976446A - 相補形ｍｏｓ集積回路装置 - Google Patents

相補形ｍｏｓ集積回路装置

Info

Publication number
JPS5976446A
JPS5976446A JP57188554A JP18855482A JPS5976446A JP S5976446 A JPS5976446 A JP S5976446A JP 57188554 A JP57188554 A JP 57188554A JP 18855482 A JP18855482 A JP 18855482A JP S5976446 A JPS5976446 A JP S5976446A
Authority
JP
Japan
Prior art keywords
channel
gate
transistor
power supply
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57188554A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0250627B2 (enrdf_load_stackoverflow
Inventor
Teruo Noguchi
野口　照雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57188554A priority Critical patent/JPS5976446A/ja
Publication of JPS5976446A publication Critical patent/JPS5976446A/ja
Publication of JPH0250627B2 publication Critical patent/JPH0250627B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays

Landscapes

  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP57188554A 1982-10-25 1982-10-25 相補形ｍｏｓ集積回路装置 Granted JPS5976446A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57188554A JPS5976446A (ja) 1982-10-25 1982-10-25 相補形ｍｏｓ集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57188554A JPS5976446A (ja) 1982-10-25 1982-10-25 相補形ｍｏｓ集積回路装置

Publications (2)

Publication Number Publication Date
JPS5976446A true JPS5976446A (ja) 1984-05-01
JPH0250627B2 JPH0250627B2 (enrdf_load_stackoverflow) 1990-11-02

Family

ID=16225724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57188554A Granted JPS5976446A (ja) 1982-10-25 1982-10-25 相補形ｍｏｓ集積回路装置

Country Status (1)

Country Link
JP (1) JPS5976446A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011013322A1 (ja) * 2009-07-29 2011-02-03 パナソニック株式会社 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011013322A1 (ja) * 2009-07-29 2011-02-03 パナソニック株式会社 半導体装置

Also Published As

Publication number Publication date
JPH0250627B2 (enrdf_load_stackoverflow) 1990-11-02

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