JPS5975670A - Manufacture of thin film semiconductor device - Google Patents
Manufacture of thin film semiconductor deviceInfo
- Publication number
- JPS5975670A JPS5975670A JP18695882A JP18695882A JPS5975670A JP S5975670 A JPS5975670 A JP S5975670A JP 18695882 A JP18695882 A JP 18695882A JP 18695882 A JP18695882 A JP 18695882A JP S5975670 A JPS5975670 A JP S5975670A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- film
- gate electrode
- semiconductor device
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 39
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000010408 film Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000010438 heat treatment Methods 0.000 claims abstract description 14
- 238000002844 melting Methods 0.000 claims abstract description 6
- 230000008018 melting Effects 0.000 claims abstract description 6
- 230000005469 synchrotron radiation Effects 0.000 claims description 5
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 238000005468 ion implantation Methods 0.000 abstract description 6
- 239000005297 pyrex Substances 0.000 abstract description 6
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 230000005855 radiation Effects 0.000 abstract description 3
- 238000010891 electric arc Methods 0.000 abstract description 2
- 229910052736 halogen Inorganic materials 0.000 abstract description 2
- 150000002367 halogens Chemical class 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 239000011521 glass Substances 0.000 description 6
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 5
- 239000010453 quartz Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、薄膜半導体装置の製造方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a thin film semiconductor device.
従来の薄膜半導体製造方法における熱処理は、長時間、
基板及び素子全体の温度が上昇する熱処理方法であり、
低温プロセス及び高温プロセスがある。低温プロセスに
おいて、透明絶縁基板として低コストのソーダ・ガラス
又はパイレックスを使用できる反面、薄膜半導体装置製
造時における熱処理が基板全体の温度を上昇させるため
、熱処理温度の上限が基板の歪点（ソーダ・ガラス４８
０°Ｃ，パイレックス５８０°Ｃ）で決まり、低温熱処
理のため薄膜半導体装置のソース・ドレイン高濃度不純
物層の活性化が低く、ゲート酸化膜質が緻密でないため
、薄膜トランジスタの電気特性が、高温プロセスによる
薄膜トランジスタの電気特性に比べて劣るという欠点が
あった。Heat treatment in conventional thin film semiconductor manufacturing methods takes a long time,
It is a heat treatment method in which the temperature of the entire substrate and element increases,
There are low temperature processes and high temperature processes. In low-temperature processes, low-cost soda glass or Pyrex can be used as the transparent insulating substrate, but the heat treatment during thin-film semiconductor device manufacturing increases the temperature of the entire substrate, so the upper limit of the heat treatment temperature is the strain point of the substrate (soda glass). glass 48
0°C, Pyrex 580°C), and due to the low-temperature heat treatment, the activation of the high concentration impurity layer of the source and drain of the thin film semiconductor device is low, and the gate oxide film quality is not dense, so the electrical characteristics of the thin film transistor are The drawback was that the electrical characteristics were inferior to those of thin film transistors.
一方、高温プロセスにおいて、透明絶縁基板として歪点
の高い石英基板を用いなければならない。石英基板はソ
ーダ・ガラスやパイレックスに比べて非常に高コストな
ため、従来の高温プロセスでは、薄膜トランジスタの電
気特性は良好なものの、薄膜半導体装置のコストが高く
なるというような欠点があった。On the other hand, in high-temperature processes, a quartz substrate with a high strain point must be used as the transparent insulating substrate. Quartz substrates are much more expensive than soda glass or Pyrex, so conventional high-temperature processes have the drawback of increasing the cost of thin-film semiconductor devices, although the electrical properties of thin-film transistors are good.
本発明は、絶縁基板透過波長領域のインコヒーレント放
射光により選択的に薄膜能動素子部のみを高温に熱処理
することを特徴とし、その目的は低コストで良質な電気
特性を持っ薄膜半導体素子部℃供することにある。The present invention is characterized by selectively heat-treating only the thin film active element portion to a high temperature using incoherent radiation light in the wavelength region transmitted through an insulating substrate. It is about providing.
以下実施例を用いて詳細に説明する。This will be explained in detail below using examples.
第１図〜第４図は、本発明に依る薄膜半導体装置の製造
方体である。第１図はソーダ・ガラス又はパイレックス
の絶縁基板１上に光ＯＶＤ又はＯＶＤにて８１０２など
の高融点透明薄膜９を形成後、半導体薄ｊ模２を形成す
る。第２図において光ＯＶＤ法又はＯＶＤ法によりゲー
ト膜６を形成する。次に第５図においてＯＶＤ法により
ｐｏｌｙＳ１膜ゲート電極４を形成した後、大電流イオ
ン注入によりソース、ドレイン領域６を形成する。1 to 4 show a manufacturing cube of a thin film semiconductor device according to the present invention. In FIG. 1, a high melting point transparent thin film 9 such as 8102 is formed on an insulating substrate 1 made of soda glass or Pyrex by optical OVD or OVD, and then a semiconductor thin film 2 is formed. In FIG. 2, a gate film 6 is formed by a photo-OVD method or an OVD method. Next, in FIG. 5, after a polyS1 film gate electrode 4 is formed by the OVD method, source and drain regions 6 are formed by high current ion implantation.
イオン注入後、アーク放電フラッシュ・ランプ（放射光
波長０．３〜１．０μ惜）又はタングステン抵抗ハロゲ
ンランプ（放射光波長０．３〜３．０７７ ｍ ）で、
短時間高温熱処理を行ない、イオン注入領域の活性化及
びゲート電極下の５１０２膜質を緻密にする。熱源とし
て絶縁基板透過波長領域の放射光を用いるため高温度に
湿度上昇する領域は、イオン注入された半導体薄膜６．
ゲート電極４及びゲート電極と半導体簿膜に囲まれたゲ
ート膜３領域である。従って緻密なゲート膜及び高い活
性のソース・ドレインを提供する。絶縁基板１は放射光
を吸収せず温度上昇が少ない。従って、基板１中に含ま
れるＮａなどのアルカリ金属が薄膜２に拡散しない。ま
た高融点絶縁膜９は、半導体薄膜２の温度上昇に伴ない
熱伝導により絶縁膜９の半導体簿膜２との境界部分のみ
温度上昇する。第４図は、絶縁層７を形成後コンタクト
ホールを形成し透明導電性膜８をパターニングして完成
した本発明による薄膜半導体装置の断面図である。なお
、放射光による選択薄膜半導体素子部熱処理は、絶縁層
７．透明導電性伝導膜８に各々５ｉｎ２ 。After ion implantation, using an arc discharge flash lamp (radiant wavelength 0.3 to 1.0 μm) or a tungsten resistance halogen lamp (radiant wavelength 0.3 to 3.077 m),
High-temperature heat treatment is performed for a short time to activate the ion implantation region and make the 5102 film quality under the gate electrode dense. Since synchrotron radiation in the insulating substrate transmission wavelength range is used as a heat source, the area where the temperature and humidity rise is high and the semiconductor thin film 6.
This is a region of the gate electrode 4 and the gate film 3 surrounded by the gate electrode and the semiconductor film. Therefore, a dense gate film and a highly active source/drain are provided. The insulating substrate 1 does not absorb radiated light and has little temperature rise. Therefore, alkali metals such as Na contained in the substrate 1 do not diffuse into the thin film 2. Further, the temperature of the high melting point insulating film 9 increases only at the boundary portion of the insulating film 9 with the semiconductor thin film 2 due to heat conduction as the temperature of the semiconductor thin film 2 increases. FIG. 4 is a cross-sectional view of a thin film semiconductor device according to the present invention completed by forming an insulating layer 7, forming contact holes, and patterning a transparent conductive film 8. Note that the selective thin film semiconductor element portion heat treatment using synchrotron radiation is performed on the insulating layer 7. Each transparent conductive film 8 has an area of 5 in2.
工１′０を用いた場合は、絶縁層７形成後及び工ＴＯ膜
８形成後も可能である。この場合にも、基板１、絶縁層
７ 、 工ＴＯ膜８の温度は上昇しない。If the process 1'0 is used, it is also possible to perform the process after forming the insulating layer 7 and after forming the process TO film 8. Also in this case, the temperatures of the substrate 1, insulating layer 7, and TO film 8 do not rise.
以上説明したように、本発明による熱処理では、透明絶
縁基板１の温度を上昇させることなく、薄膜半導体素子
部のみの高温熱処理を可能にする。従って、絶縁基板１
には低コストのソーダガラス又はパイレックスを使用で
き、しかも薄膜能動素子部は高温熱処理により良質の電
気特性を示す。本発明は、高性能・低コストの薄膜半導
体の製造方法を提供する。As explained above, in the heat treatment according to the present invention, high temperature heat treatment of only the thin film semiconductor element portion can be performed without increasing the temperature of the transparent insulating substrate 1. Therefore, the insulating substrate 1
Low-cost soda glass or Pyrex can be used for this purpose, and the thin film active element portion exhibits good electrical properties through high-temperature heat treatment. The present invention provides a method for manufacturing a high-performance, low-cost thin film semiconductor.
第１図〜第４図は、本発明による薄膜半導体装置のル；
１造方法を示す。
１・・・・・・絶縁基板
２・・・・・・半導体薄膜
３・・・・・・ゲート膜
４・・・・・・ゲート電極
５・・・・・・高濃度イオン注入
６・・・・・・ソース・ドレイン領域
７・・・・・・絶縁層
８・・・・・・透明性伝導膜
９・・・・・・高融点絶縁膜
以 上
出願人 株式会社諏訪精工舎
代理人 弁理士 最上 務1 to 4 show a diagram of a thin film semiconductor device according to the present invention;
1 method is shown. 1...Insulating substrate 2...Semiconductor thin film 3...Gate film 4...Gate electrode 5...High concentration ion implantation 6... ... Source/drain region 7 ... Insulating layer 8 ... Transparent conductive film 9 ... High melting point insulating film and above Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Tsutomu Mogami
Claims (1)
、絶縁基板透過波長領域のインコヒーレント・放射光に
より選択的に薄膜能動素子部のみを高熱処理することを
特徴とする薄膜半導体装置の製造方法。 ２、 透明性絶縁基板上には高い融点を持つ透明性絶縁
膜が形成され、高融点絶縁膜上の薄膜能動素子部は、絶
縁基板透過波長領域のインコヒーレント放射光により熱
処理されることを特徴とする特許請求範囲第１項記載の
薄膜半導体装置の製造方法。 ＆ 透明性絶縁基板上の薄膜半導体装置において、絶縁
物透過波長領域のインコヒーレント放射光により、半導
体薄膜及びゲート電極を高温に熱処理し、半導体薄膜と
ゲート電極からの黙伝尋により、ゲート電極下のゲート
絶縁膜が熱処理されることを特徴とする特許請求範囲第
１項記載の薄膜半導体装置の製造方法。[Claims] 1. When manufacturing a thin film semiconductor device on a transparent insulating substrate, only the thin film active element portion is selectively subjected to high heat treatment using incoherent synchrotron radiation in the wavelength range that transmits the insulating substrate. A method for manufacturing a thin film semiconductor device. 2. A transparent insulating film with a high melting point is formed on the transparent insulating substrate, and the thin film active element portion on the high melting point insulating film is heat-treated with incoherent synchrotron radiation in the wavelength range that is transmitted through the insulating substrate. A method for manufacturing a thin film semiconductor device according to claim 1. & In a thin film semiconductor device on a transparent insulating substrate, the semiconductor thin film and the gate electrode are heat-treated to a high temperature using incoherent synchrotron radiation in the insulator-transmitting wavelength region, and the tacit communication between the semiconductor thin film and the gate electrode causes 2. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the gate insulating film is subjected to heat treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18695882A JPS5975670A (en) | 1982-10-25 | 1982-10-25 | Manufacture of thin film semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18695882A JPS5975670A (en) | 1982-10-25 | 1982-10-25 | Manufacture of thin film semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5975670A true JPS5975670A (en) | 1984-04-28 |
Family
ID=16197696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18695882A Pending JPS5975670A (en) | 1982-10-25 | 1982-10-25 | Manufacture of thin film semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5975670A (en) |
Cited By (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6235571A (en) * | 1985-08-08 | 1987-02-16 | Sony Corp | Manufacture of semiconductor device |
| JPH0215669A (en) * | 1988-07-01 | 1990-01-19 | Ricoh Co Ltd | Semiconductor device |
| JPH02194626A (en) * | 1989-01-24 | 1990-08-01 | Sony Corp | Manufacture of thin film transistor |
| JPH06333950A (en) * | 1994-01-27 | 1994-12-02 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate field effect semiconductor device |
| JPH0799208A (en) * | 1994-06-10 | 1995-04-11 | Semiconductor Energy Lab Co Ltd | Manufacture of insulation gate type field effect semiconductor device for liquid crystal display panel |
| JPH07176746A (en) * | 1994-11-25 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Insulated-gate type field-effect semiconductor device |
| JPH07176758A (en) * | 1984-05-18 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Insulated gate type field effect semiconductor device |
| JPH07176759A (en) * | 1994-11-25 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate type field effect semiconductor device |
| JPH07183523A (en) * | 1994-11-25 | 1995-07-21 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate field effect semiconductor device |
| JPH0851221A (en) * | 1995-09-01 | 1996-02-20 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device for liquid crystal display panel, and its manufacture |
| JPH09181327A (en) * | 1996-11-29 | 1997-07-11 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device |
| JPH09181326A (en) * | 1984-05-18 | 1997-07-11 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device |
| JPH09186344A (en) * | 1996-11-29 | 1997-07-15 | Semiconductor Energy Lab Co Ltd | Method for manufacturing insulating gate type semiconductor device |
| US6210997B1 (en) | 1993-07-27 | 2001-04-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US6331717B1 (en) | 1993-08-12 | 2001-12-18 | Semiconductor Energy Laboratory Co. Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| JP2002025906A (en) * | 2000-07-06 | 2002-01-25 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
| US6500703B1 (en) | 1993-08-12 | 2002-12-31 | Semicondcutor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| US6997985B1 (en) | 1993-02-15 | 2006-02-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor, semiconductor device, and method for fabricating the same |
| JP2014033212A (en) * | 2013-09-13 | 2014-02-20 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5568652A (en) * | 1978-11-17 | 1980-05-23 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacturing method of semiconductor film |
| JPS55154767A (en) * | 1979-05-23 | 1980-12-02 | Toshiba Corp | Manufacture of semiconductor device |
-
1982
- 1982-10-25 JP JP18695882A patent/JPS5975670A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5568652A (en) * | 1978-11-17 | 1980-05-23 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacturing method of semiconductor film |
| JPS55154767A (en) * | 1979-05-23 | 1980-12-02 | Toshiba Corp | Manufacture of semiconductor device |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09181326A (en) * | 1984-05-18 | 1997-07-11 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device |
| JPH07176758A (en) * | 1984-05-18 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Insulated gate type field effect semiconductor device |
| JPS6235571A (en) * | 1985-08-08 | 1987-02-16 | Sony Corp | Manufacture of semiconductor device |
| JPH0215669A (en) * | 1988-07-01 | 1990-01-19 | Ricoh Co Ltd | Semiconductor device |
| JPH02194626A (en) * | 1989-01-24 | 1990-08-01 | Sony Corp | Manufacture of thin film transistor |
| US6997985B1 (en) | 1993-02-15 | 2006-02-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor, semiconductor device, and method for fabricating the same |
| US6465284B2 (en) | 1993-07-27 | 2002-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US6210997B1 (en) | 1993-07-27 | 2001-04-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US6331717B1 (en) | 1993-08-12 | 2001-12-18 | Semiconductor Energy Laboratory Co. Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| US6437366B1 (en) | 1993-08-12 | 2002-08-20 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| US6500703B1 (en) | 1993-08-12 | 2002-12-31 | Semicondcutor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| US7381598B2 (en) | 1993-08-12 | 2008-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| JPH06333950A (en) * | 1994-01-27 | 1994-12-02 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate field effect semiconductor device |
| JPH0799208A (en) * | 1994-06-10 | 1995-04-11 | Semiconductor Energy Lab Co Ltd | Manufacture of insulation gate type field effect semiconductor device for liquid crystal display panel |
| JPH07183523A (en) * | 1994-11-25 | 1995-07-21 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate field effect semiconductor device |
| JPH07176759A (en) * | 1994-11-25 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Manufacture of insulated gate type field effect semiconductor device |
| JPH07176746A (en) * | 1994-11-25 | 1995-07-14 | Semiconductor Energy Lab Co Ltd | Insulated-gate type field-effect semiconductor device |
| JPH0851221A (en) * | 1995-09-01 | 1996-02-20 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device for liquid crystal display panel, and its manufacture |
| JPH09181327A (en) * | 1996-11-29 | 1997-07-11 | Semiconductor Energy Lab Co Ltd | Insulated gate field-effect semiconductor device |
| JPH09186344A (en) * | 1996-11-29 | 1997-07-15 | Semiconductor Energy Lab Co Ltd | Method for manufacturing insulating gate type semiconductor device |
| JP2002025906A (en) * | 2000-07-06 | 2002-01-25 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
| JP2014033212A (en) * | 2013-09-13 | 2014-02-20 | Semiconductor Energy Lab Co Ltd | Method for manufacturing semiconductor device |
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