JP4312741B2 - Thin film transistor substrate for liquid crystal display device and manufacturing method thereof - Google Patents
Thin film transistor substrate for liquid crystal display device and manufacturing method thereof Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims description 27
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 20
- 239000010409 thin film Substances 0.000 title claims description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000010408 film Substances 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 18
- 239000012535 impurity Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- 239000011810 insulating material Substances 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 description 11
- 238000005468 ion implantation Methods 0.000 description 5
- 230000004913 activation Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
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- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
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Description
本発明は液晶表示装置用薄膜トランジスタ基板およびその製造方法に係り、より詳しくは、レーザビーム照射による活性化の際にこのレーザビームの全透過が可能な絶縁層がゲート電極上に形成されていて、ソース／ドレイン形成のためのイオン注入時にゲート電極が損傷されることを防止する液晶表示装置用薄膜トランジスタ基板およびその製造方法に関する。 The present invention relates to a thin film transistor substrate for a liquid crystal display device and a method for manufacturing the same, and more specifically, an insulating layer capable of transmitting all of the laser beam upon activation by laser beam irradiation is formed on the gate electrode. The present invention relates to a thin film transistor substrate for a liquid crystal display device that prevents damage to a gate electrode during ion implantation for forming a source / drain, and a method for manufacturing the same.
一般に、液晶表示装置は薄膜トランジスタおよび画素電極による多数の画素単位が行列の形態で形成されており、ゲートラインおよびデータラインがそれぞれ画素行と画素列に沿って形成されている薄膜トランジスタ基板と、共通電極が形成されているカラーフィルタ基板およびその間に封じ入れている液晶物質を含んでいる。
このとき、前記薄膜トランジスタ基板およびそのゲート電極は、ゲート駆動ドライブからのゲート駆動信号がゲートラインを介して入力されアクティブ層にチャンネルを形成させる。これによってデータ駆動ドライブからのデータ信号が前記データラインを通じてソース電極に伝達され、半導体層とドレイン電極を経て画素電極に伝達される。
In general, a liquid crystal display device includes a thin film transistor substrate in which a large number of pixel units including thin film transistors and pixel electrodes are formed in a matrix, a gate line and a data line formed along a pixel row and a pixel column, respectively, and a common electrode And a liquid crystal substance sealed therebetween.
At this time, the thin film transistor substrate and its gate electrode receive the gate drive signal from the gate drive drive through the gate line and form a channel in the active layer. Accordingly, a data signal from the data driving drive is transmitted to the source electrode through the data line, and is transmitted to the pixel electrode through the semiconductor layer and the drain electrode.
このような液晶表示装置はアクティブ層を多結晶シリコンを用いて形成することができる。このとき、多結晶シリコンで形成したアクティブ層にソース／ドレイン領域を形成するために不純物イオンを注入して活性化する方法として、工程中の温度に基づいて高温工程と低温工程とに分けることができる。
まず、高温工程は高いイオン電流あるいは高い基板温度、すなわち２００℃ないし３００℃におけるイオンシャワー注入技術を用いる方法である。この方法では、イオンシャワー注入の際にフォトレジストマスクの使用が難しく金属マスクを使用する工程が必要になり、これによって製造工程が複雑で生産費用が多くかかるという短所がある。
In such a liquid crystal display device, the active layer can be formed using polycrystalline silicon. At this time, as a method of activating by implanting impurity ions to form source / drain regions in the active layer formed of polycrystalline silicon, it can be divided into a high temperature process and a low temperature process based on the temperature during the process. it can.
First, the high temperature process is a method using an ion shower implantation technique at a high ion current or a high substrate temperature, that is, 200 ° C. to 300 ° C. In this method, it is difficult to use a photoresist mask at the time of ion shower implantation, and a process of using a metal mask is required, which results in a complicated manufacturing process and high production cost.
次に、低温工程は低い温度、すなわち１００℃以下の基板温度でイオン注入を行い、この後レーザを用いて活性化する方法である。
このようなレーザを用いた活性化方法では、レーザ照射を行う際にゲート電極が露出しているため、急激な熱膨張によるヒルロックが発生する。特に、ゲート電極がイオン注入工程を経た後ゲート電極内に不純物が流入されるとき、レーザ波長に対する吸収係数が急激に増加してヒルロックの発生がさらに激しくなるという問題点がある。
Next, the low-temperature process is a method in which ion implantation is performed at a low temperature, that is, a substrate temperature of 100 ° C. or less, and then activated using a laser.
In such an activation method using a laser, the gate electrode is exposed when laser irradiation is performed, so that hill rock is generated due to rapid thermal expansion. In particular, when impurities flow into the gate electrode after the gate electrode has undergone the ion implantation process, there is a problem in that the absorption coefficient with respect to the laser wavelength increases abruptly and hillocks are further generated.
本発明の目的は、低い基板温度でアクティブ層のソース／ドレイン領域にイオン注入を行う低温工程を用いることにより製造コストを低減するとともに、レーザビームの照射により活性化を行う際に、ゲート電極の損傷を防止することが可能な液晶表示装置用薄膜トランジスタ基板の製造方法を提供することにある。 An object of the present invention is to reduce the manufacturing cost by using a low temperature process in which ions are implanted into a source / drain region of an active layer at a low substrate temperature, and at the time of activation by laser beam irradiation, An object of the present invention is to provide a method for manufacturing a thin film transistor substrate for a liquid crystal display device capable of preventing damage.
以下の段階を含む液晶表示装置用薄膜トランジスタ基板の製造方法は、本発明の範囲に含まれる。
・基板上に多結晶シリコン膜を形成する段階、
・前記多結晶シリコン膜上にゲート絶縁膜を形成する段階、
・前記ゲート絶縁膜上に金属層を形成する段階、
・前記金属層上に絶縁膜を形成する段階、
・前記金属層と絶縁膜とをパターニングしてゲート電極を形成する段階、
・多結晶シリコン膜に不純物をイオン注入する段階、
・前記ゲート絶縁膜及び前記絶縁膜にレーザビームを照射することにより、不純物をアニーリングする段階。
前記絶縁膜を形成する段階では、前記レーザビームのエネルギーバンドギャップより大きいバンドギャップを有する絶縁物質で前記絶縁膜を形成する。好ましくは、二酸化ケイ素（ＳｉＯ2 ）または窒化ケイ素（ＳｉＮｘ）で前記絶縁膜を形成するとよい。
A method of manufacturing a thin film transistor substrate for a liquid crystal display device including the following steps is included in the scope of the present invention.
A step of forming a polycrystalline silicon film on the substrate;
A step of forming a gate insulating film on the polycrystalline silicon film;
-Forming a metal layer on the gate insulating film;
-Forming an insulating film on the metal layer;
-Patterning the metal layer and the insulating film to form a gate electrode;
A step of ion-implanting impurities into the polycrystalline silicon film;
And annealing the impurities by irradiating the gate insulating film and the insulating film with a laser beam.
In the step of forming the insulating film, the insulating film is formed of an insulating material having a band gap larger than the energy band gap of the laser beam. Preferably, the insulating film is formed of silicon dioxide (SiO 2 ) or silicon nitride (SiNx).
このことにより、多結晶シリコン膜で形成された基板上のアクティブ層にレーザビームを照射することによって不純物イオンの注入を行う際に、ゲート電極上に位置する絶縁膜によって、注入されたイオンはゲート電極の表面まで至ることなく、また活性化を行うために照射されたレーザビームはこの絶縁膜を通過してゲート電極の表面で全反射されることとなる。このことから、ゲート電極の損傷を防止することができる。 As a result, when the impurity ions are implanted by irradiating the active layer on the substrate formed of the polycrystalline silicon film with a laser beam, the implanted ions are gated by the insulating film located on the gate electrode. The laser beam irradiated for activation without reaching the surface of the electrode passes through this insulating film and is totally reflected on the surface of the gate electrode. Thus, damage to the gate electrode can be prevented.
以上説明したように、本発明ではアクティブ層のソース／ドレイン領域に不純物イオンの注入を行う際に、注入を行う不純物イオンがゲート電極に至ることを抑制することができ、ソース／ドレイン領域に注入されたイオンを活性化する際に、照射されるレーザビームを透過させることによってゲート電極の損傷を防止できるという効果がある。 As described above, according to the present invention, when impurity ions are implanted into the source / drain regions of the active layer, the impurity ions to be implanted can be prevented from reaching the gate electrode, and the ions are implanted into the source / drain regions. When activating the generated ions, there is an effect that damage of the gate electrode can be prevented by transmitting the irradiated laser beam.
以下、本発明の好ましい実施例を添付図面に基づいて詳細に説明する。
図１は本発明の一実施形態に従う液晶表示装置用薄膜トランジスタ基板を示す断面図であり、図２ないし図８は本発明の実施形態に従う液晶表示装置用薄膜トランジスタ基板の製造工程を示す断面図である。
まず、図２に示すように、基板２上に多結晶シリコン膜を積層してアクティブ層４を形成する。
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view illustrating a thin film transistor substrate for a liquid crystal display device according to an embodiment of the present invention, and FIGS. 2 to 8 are cross-sectional views illustrating manufacturing processes of the thin film transistor substrate for a liquid crystal display device according to an embodiment of the present invention. .
First, as shown in FIG. 2, an
次に、図３に示すように、多結晶シリコン膜によるアクティブ層４上に酸化ケイ素（ＳｉＯ2 ）を用いてゲート絶縁膜６を形成する。
次に、図４に示すように、ゲート絶縁膜６上にアルミニウム（Ａｌ）で金属層８を積層する。
次に、図５に示すように、金属層８上に絶縁膜１０を積層する。
Next, as shown in FIG. 3, a gate
Next, as shown in FIG. 4, a
Next, as shown in FIG. 5, the
次に、図６に示すように、金属層８と絶縁膜１０とを同時にパターニングする。
次に、図７に示すように、ｎ+ 不純物をイオン注入１２してイオン注入領域４−１を形成する。
次に、図８に示すように、アクティブ層４にイオン注入された不純物をレーザビーム１４の照射によってアニーリングする。
Next, as shown in FIG. 6, the
Next, as shown in FIG. 7, an ion implantation region 4-1 is formed by
Next, as shown in FIG. 8, the impurity ion-implanted into the
絶縁膜１０はバンドギャップが８．０ｅＶ程度であるＳｉＯ２で形成する。これは、アニーリングを行うために照射する代表的なレーザビームであるＸｅＣｌの波長が３０８ｎｍであるため、これをエネルギーの大きさで換算すると４．０ｅＶである。従って、これよりバンドギャップが大きい絶縁膜１０を形成することにより、レーザビームの照射によるアニーリングの際にゲート電極８が損傷されることを防止できる。
The
また、絶縁膜１０としてバンドギャップエネルギーが５ｅＶであるＳｉＮｘを用いることも可能である。
Further, SiNx having a band gap energy of 5 eV can be used as the
２ 基板
６ ゲート絶縁膜
８ 金属層（ゲート電極）
１０ 絶縁膜
2
10 Insulating film
Claims (2)
前記多結晶シリコン膜上にゲート絶縁膜を形成する段階と、
前記ゲート絶縁膜上に金属層を形成する段階と、
前記金属層上に絶縁膜を形成する段階と、
前記金属層と絶縁膜とをパターニングしてゲート電極を形成する段階と、
多結晶シリコン膜に不純物をイオン注入する段階と、
前記ゲート絶縁膜及び前記絶縁膜にレーザビームを照射することにより、不純物をアニーリングする段階と、を含み、
前記絶縁膜を形成する段階では、前記レーザビームのエネルギーバンドギャップより大きいバンドギャップを有する絶縁物質で前記絶縁膜を形成する、液晶表示装置用薄膜トランジスタ基板の製造方法。 Forming a polycrystalline silicon film on the substrate;
Forming a gate insulating film on the polycrystalline silicon film;
Forming a metal layer on the gate insulating layer;
Forming an insulating film on the metal layer;
Patterning the metal layer and the insulating film to form a gate electrode;
Implanting impurities into the polycrystalline silicon film;
Annealing the impurity by irradiating the gate insulating film and the insulating film with a laser beam, and
A method of manufacturing a thin film transistor substrate for a liquid crystal display device, wherein in the step of forming the insulating film, the insulating film is formed of an insulating material having a band gap larger than an energy band gap of the laser beam.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950035200A KR100188090B1 (en) | 1995-10-12 | 1995-10-12 | Fabrication method of thin film transistor panel for lcd |
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| JP27048196A Division JP3774278B2 (en) | 1995-10-12 | 1996-10-14 | Method for manufacturing thin film transistor substrate for liquid crystal display device |
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| JP2005326867A JP2005326867A (en) | 2005-11-24 |
| JP4312741B2 true JP4312741B2 (en) | 2009-08-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27048196A Expired - Fee Related JP3774278B2 (en) | 1995-10-12 | 1996-10-14 | Method for manufacturing thin film transistor substrate for liquid crystal display device |
| JP2005172379A Expired - Fee Related JP4312741B2 (en) | 1995-10-12 | 2005-06-13 | Thin film transistor substrate for liquid crystal display device and manufacturing method thereof |
| JP2008232509A Withdrawn JP2009048199A (en) | 1995-10-12 | 2008-09-10 | Thin film transistor substrate for liquid crystal display device and method for manufacturing the same |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27048196A Expired - Fee Related JP3774278B2 (en) | 1995-10-12 | 1996-10-14 | Method for manufacturing thin film transistor substrate for liquid crystal display device |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008232509A Withdrawn JP2009048199A (en) | 1995-10-12 | 2008-09-10 | Thin film transistor substrate for liquid crystal display device and method for manufacturing the same |
Country Status (3)
| Country | Link |
|---|---|
| JP (3) | JP3774278B2 (en) |
| KR (1) | KR100188090B1 (en) |
| TW (1) | TWI246620B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3318285B2 (en) | 1999-05-10 | 2002-08-26 | 松下電器産業株式会社 | Method for manufacturing thin film transistor |
| KR101781175B1 (en) * | 2015-08-31 | 2017-09-22 | 가천대학교 산학협력단 | Junctionless field-effect transistor having ultra-thin low-crystalline-silicon channel and fabrication method thereof |
| JP6864158B2 (en) * | 2018-06-22 | 2021-04-28 | 住友重機械工業株式会社 | Laser annealing method and laser annealing method for semiconductor devices |
| CN109920731B (en) * | 2019-03-20 | 2021-03-19 | 上海华虹宏力半导体制造有限公司 | Polycrystalline silicon thin film transistor and manufacturing method thereof |
| CN115497816B (en) * | 2022-10-19 | 2023-10-17 | 弘大芯源(深圳)半导体有限公司 | Semiconductor field effect integrated circuit and preparation method thereof |
-
1995
- 1995-10-12 KR KR1019950035200A patent/KR100188090B1/en not_active IP Right Cessation
-
1996
- 1996-09-07 TW TW085110952A patent/TWI246620B/en not_active IP Right Cessation
- 1996-10-14 JP JP27048196A patent/JP3774278B2/en not_active Expired - Fee Related
-
2005
- 2005-06-13 JP JP2005172379A patent/JP4312741B2/en not_active Expired - Fee Related
-
2008
- 2008-09-10 JP JP2008232509A patent/JP2009048199A/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005326867A (en) | 2005-11-24 |
| KR100188090B1 (en) | 1999-07-01 |
| JP3774278B2 (en) | 2006-05-10 |
| TWI246620B (en) | 2006-01-01 |
| JPH09133928A (en) | 1997-05-20 |
| JP2009048199A (en) | 2009-03-05 |
| KR970024303A (en) | 1997-05-30 |
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