JPH0851221A - Insulated gate field-effect semiconductor device for liquid crystal display panel, and its manufacture - Google Patents

Abstract

PURPOSE:To simplify the acceleration of crystallization and improve the switching properties, and enable the use at high frequency by constituting this insulated gate field-effect semiconductor device in double structure of a semiconductor where the source region and the drain region are crystallized only partially in the direction form the surface to its depth and a non-single crystalline semiconductor. CONSTITUTION:By constituting this insulated gate field-effect semiconductor device out of an insulating substrate 1, a non-single crystalline semiconductor 2 where hydrogen or halogen elements are added, a gate insulating film 3 made on the amorphous semiconductor 2, a gate part consisting of the gate electrode 4 made thereon, and a source region 7 and drain region 8 whose one part each is crystallized, with impurities added in all the non-single crystalline semiconductor region excluding the section masked with the gate electrode, this can cope with high-speed switching with the crystallized semiconductor and enlarge the breakdown voltage of junction to reverse bias with the non-single crystalline semiconductor.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a semiconductor integrated circuit,
The present invention relates to an insulated gate field effect semiconductor device for a liquid crystal display panel used for a liquid crystal display panel and the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a field effect transistor described in Japanese Patent Laid-Open No. 58-2073, a source region and a drain region are selectively annealed to form a polycrystalline region and a channel forming region is formed into an amorphous region. There is. That is, the field effect transistor shown in the publication is
A part of the amorphous region is annealed to form a polycrystalline region.

[0003]

As described above, in the conventional method for manufacturing an insulated gate field effect semiconductor device, the source region and the drain region are formed by selectively adding impurities. Further, the source region and the drain region are selectively annealed by irradiating light in order to promote crystallization. That is,
In the conventional example, impurities are selectively added to each of the insulated gate field effect semiconductor devices formed on the substrate, or crystallization is promoted.

Further, in the conventional insulated gate field effect semiconductor device, since the source region and the drain region are selectively annealed, an uncrystallized portion always remains in the non-single crystal semiconductor layer. When an uncrystallized region remains in the insulated gate field effect semiconductor device as described above, a part of the current also flows in this amorphous portion when operating as an insulated gate field effect semiconductor device. Since the amorphous portion has a higher resistance than the crystallized portion,
It is difficult for current to flow, and once it flows in, it accumulates and then slowly flows out. That is, the insulated gate field effect semiconductor device in the conventional example has a long lifetime in which a current flows and has a hysteresis characteristic.

In order to solve the above problems, the present invention is simple in promoting the crystallization of the source region and the drain region in many insulated gate field effect semiconductor devices, and has good switching characteristics. An object of the present invention is to provide an insulated gate field effect semiconductor device for a liquid crystal display panel that can be used at high frequencies and a method for manufacturing the same.

[0006]

[Means for Solving the Problems]

(First Invention) In order to achieve the above object, an insulated gate field effect semiconductor device for a liquid crystal display panel of the present invention is a non-single crystal semiconductor (2) in which hydrogen or a halogen element is added on an insulating substrate (1). ), A gate insulating film (3) formed on the non-single-crystal semiconductor (2), a gate portion composed of the gate insulating film (3) and a gate electrode (4) formed thereon, All non-single-crystal semiconductor regions except the part masked by the gate part are composed of a source region (7) and a drain region (8) crystallized by adding impurities,
The source region (7) and the drain region (8) are characterized by having a double structure of a semiconductor partially crystallized in the depth direction from the surface and a non-single crystal semiconductor. .

(Second Invention) An insulated gate field effect semiconductor device for a liquid crystal display panel according to the present invention comprises a plurality of non-single crystal semiconductor regions (2) to which hydrogen or a halogen element is added on an insulating substrate (1). A gate insulating film (3) formed on each of the plurality of non-single-crystal semiconductor regions (2), and a gate electrode (4) formed on each of the plurality of gate insulating films (3)
And a plurality of source regions (7) and drain regions crystallized by adding impurities to all the non-single-crystal semiconductor regions excluding a portion masked by the plurality of gate portions. (8) and the plurality of source regions (7) and drain regions (8) have a double structure of a semiconductor partially crystallized in the depth direction from the surface and a non-single crystal semiconductor. It is characterized by being configured.

(Third Invention) A method for manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel according to the present invention comprises a non-single crystal semiconductor layer (2) to which hydrogen or a halogen element is added on an insulating substrate (1). By forming a gate insulating film (3) on the non-single crystal semiconductor layer (2), and selectively forming a gate electrode (4) on the gate insulating film (3). A step of forming a gate portion, and a source region (7) and a drain region (8) crystallized by adding impurities to all non-single-crystal semiconductor regions except the portion masked by the gate portion. And the source region (7) using the gate portion as a mask.
And a step of crystallizing only a part of the impurity region in the depth direction from the surface in the impurity region by controlling the scanning speed of the annealing treatment by ultraviolet light over the entire drain region (8).

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION An island-shaped non-single-crystal semiconductor layer to which hydrogen or a halogen element is added is formed on an insulating substrate. A gate insulating film is formed on the island-shaped non-single-crystal semiconductor layer, and then a gate electrode is selectively formed to form a gate portion. Next, using the gate portion as a mask, impurities for forming a source region and a drain region are added. Next, ultraviolet light is applied to the entire surface of the substrate including the island-shaped non-single-crystal semiconductor layer and the portion where the non-single-crystal semiconductor layer is not formed, and at the same time, crystallizes the source region and the drain region. Encourage.

In the method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel as described above, a large number of insulated gate field effect semiconductor devices can be collectively annealed without selective annealing. Further, in the method for manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel as described above, hydrogen or a halogen element added in the non-single crystal semiconductor layer is formed so as to cover the non-single crystal semiconductor layer. Since it is a gate insulating film, it is not degassed by adding impurities and optical annealing.

Further, in the method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel, since the non-single-crystal semiconductor layer other than the channel formation region is all promoted to be crystallized, the source region and the drain region are formed. The flowing current flows only in the region that promotes crystallization. That is, the current flows only in the region that promotes crystallization with low resistance, so that it can follow a high frequency and no hysteresis characteristic appears. Further, since hydrogen or a halogen element is added to the channel formation region to be activated, the characteristics as an insulated gate field effect semiconductor device for a liquid crystal display panel are improved. With the gate portion selectively formed as a mask, the source region and the drain region are partially annealed in the depth direction from the surface by scanning with ultraviolet light. Then, the depth at which the source region and the drain region are crystallized is controlled by controlling the scanning speed of the ultraviolet light.

By controlling the depths of the crystallized regions formed on the surfaces of the source region and the drain region in this manner, the impurity regions formed of the source region and the drain region are crystallized in the semiconductor region. And a non-single crystal semiconductor have a double structure. Since there is no non-single-crystal semiconductor having a high resistance left uncrystallized around the impurity region thus formed, the current does not flow lazily. Therefore, in the insulated gate field effect semiconductor device for liquid crystal display panels, it is difficult for the ON current to flow at the rising edge of the ON current, and on the other hand, there may be a lazy flow at the falling edge of the current. lost.

Further, the applicant of the present invention has a characteristic that a crystallized semiconductor has by forming an impurity region composed of a source region and a drain region into a double structure composed of a crystallized semiconductor and a non-single crystal semiconductor. , And found that it can combine the properties of non-single crystal semiconductors. That is, in the insulated gate field effect semiconductor device for a liquid crystal display panel of the present invention, the off-current is reduced by the non-single crystal semiconductor, the breakdown voltage of the junction becomes large against the reverse bias, and the portions other than the channel formation region are crystallized. Can be turned on and off with high speed response. The present invention will be described below with reference to examples.

[0014]

Embodiments FIGS. 1A to 1C are vertical sectional views of an insulated gate field effect semiconductor device according to an embodiment of the present invention. In FIG. 1, the substrate (1) is made of quartz glass, for example, and has a thickness of 1.1 m as shown in FIG. 1 (A).
m and the size was 10 cm × 10 cm. This board (1)
Hydrogen was added to the upper surface of the substrate at a concentration of 1 atomic% or more by optical plasma CVD (low pressure mercury lamp including wavelength of 2537Å, substrate temperature 210 ° C) without using mercury excitation method of disilane (Si ₂ H ₆ ). Non-single crystal semiconductor layer containing amorphous structure (2)
Were formed to a thickness of 0.2 μm, for example.

Further, a gate insulating film (3) made of, for example, a silicon nitride film is laminated on the upper surface of the non-single crystal semiconductor layer (2) by the photo-CVD method in the same reaction furnace without exposing the semiconductor surface to the atmosphere. Was done. That is, the gate insulating film (3)
Reacts with disilane (Si ₂ H ₆ ) and ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) (a low-pressure mercury lamp containing a wavelength of 2537 Å, the substrate temperature is 250 ° C) to increase the mercury content of Si ₃ N _4. It was made to a thickness of 1000Å without using the touch method.
After that, the portion excluding the region (5) forming the insulated gate field effect semiconductor device was removed by the plasma etching method. The gate insulating film (3) can be formed over the entire surface of the substrate (1). The plasma etching reaction was performed at room temperature by introducing a reactive gas of CF ₄ + O ₂ (5%) and applying a frequency of 13.56 MHz to a parallel plate electrode (not shown).

On the gate insulating film (3), N ⁺ conductive type microcrystalline or polycrystalline semiconductor was laminated to a thickness of 0.3 μm. In this N ⁺ semiconductor, the gate electrode (4) was formed after removing the undesired portion by the photoetching method using the resist film (6). After that, this resist film (6) and N ⁺
As shown in FIG. 1 (B), the concentration of 1 × 10 ²⁰ cm ^{-3 was} obtained by ion implantation in the regions to be the source and the drain, using the gate portion consisting of the semiconductor gate electrode (4) as a mask. An impurity of one conductivity type, for example, phosphorus was added to form a pair of impurity regions (7) and (8).

Further, the substrate (1) was subjected to a photo-annealing process of strong ultraviolet light (10) after the resist film (6) of the gate electrode (4) was removed. That is, for the ultra-high pressure mercury lamp (output 5KW, wavelength 250 nm to 600 nm, light diameter 15 mm, length 180 mm), the back side uses a parabolic reflector and uses a quartz cylindrical lens (focal length 150 cm in front). , 2 mm wide, 180 mm long)
The irradiation part was linearly configured. The substrate (1) is scanned in a direction orthogonal to this linear irradiation part. And the substrate (1)
The irradiation surface of the scanner is scanned at a speed of 5 cm / min to 50 cm / min.
(Scan), and the entire surface of the substrate 10 cm × 10 cm was irradiated with strong ultraviolet light (10).

In this way, since the gate electrode (4) has a large amount of phosphorus added to the side of the gate electrode (4), it sufficiently absorbs light and becomes polycrystalline. The impurity regions (7) and (8) are
By melting and recrystallization once, melting and recrystallization were shifted (moved) in the scanning direction, that is, the X direction.
As a result, the crystal grain size could be increased because a growth mechanism was added as compared with the case where the entire surface was uniformly heated or irradiated with light. In order to manufacture an insulated gate field effect semiconductor device, a selectively formed non-single-crystal semiconductor layer is formed on an insulating substrate. Then, the non-single-crystal semiconductor layer of each non-single-crystal semiconductor layer other than the channel forming region covered with the gate portion is crystallized in the source region and the drain region by linear strong light irradiation. Can be promoted. The region polycrystallized by this strong light anneal does not have to extend to the entire region below the impurity regions (7) and (8).

As shown by broken lines (11) and (11 ') in FIG. 1, it is important that only the upper layer portion thereof is crystallized and the impurity regions (7) and (8) are activated. In addition, the ends (15), (1
5 ') is provided so as to enter the channel region side with respect to the ends (16) and (16') of the gate electrode. And N
Type impurity regions (7), (8), I type non-single crystal semiconductor region (2)
The channel formation region including the junction interfaces (17) and (17 ′) has a hybrid structure composed of a non-single crystal semiconductor in the I-type semiconductor region and a crystallized semiconductor that has entered from the impurity region. The degree of crystallized semiconductor in the I-type semiconductor region is determined by the scanning speed and intensity (illuminance) of the optical anneal.

After the step of FIG. 1B, the polyimide resin is coated on the entire surface to a thickness of 2 μm. Then, in the polyimide resin, after the electrode holes (13) and (13 ') are formed,
Aluminum om contact and its lead (1
4) and (14 ') are formed. This second layer lead (14), (1
4 ′) may be connected to the gate electrode (4) when formed. The result of this optical annealing is that the sheet resistance is 4 × 10 ^-3 (ohm cm) ^-1 to 1 × 10 ⁺² (ohm cm) before light irradiation.
It became ^-1 , and the electric conductivity characteristics were improved compared to before the photo-annealing.

FIG. 2 is a graph showing characteristics of drain current-gate voltage according to the embodiment of the present invention. When the length of the channel formation region is 3 μm and 10 μm, the channel width is 1
Under the condition of mm, the sign (2
1), (22), V _th = + 2V, V _DD =
A current of 1 × 10 ^-5 A and 2 × 10 ^-5 A was obtained at 10V. In addition,
The off-state current was (V _GG = 0V) 10 ⁻¹⁰ to 10 ⁻¹¹ (A), which was 10 ⁻⁴ times smaller than that of the single crystal semiconductor, 10 ⁻⁶ (A).

In the present embodiment, the linearly condensed light is irradiated so as to scan over the entire surface of the substrate, so that it is possible to achieve large area and large scale integration. Therefore, 500 pieces × 500 in a large area, for example, a panel of 30 cm × 30 cm
It was possible to manufacture even individual insulated gate field effect semiconductor devices, and it could be applied as an insulated gate field effect semiconductor device for controlling liquid crystal display elements. Since the treatment is performed at a low temperature of 400 ° C. or lower by a photo-annealing process, a polycrystallized or single-crystallized semiconductor is formed with hydrogen or a halogen element inside. Further, the optical annealing was performed not from the entire surface of the substrate at the same time, but from one end to the other end.

Therefore, the light emitted from the cylindrical ultra-high pressure mercury lamp was linearly condensed by the parabolic mirror and the quartz lens. The linearly condensed light was able to optically anneal the surface of the non-single-crystal semiconductor by scanning the substrate in a direction orthogonal to this. Since this optical annealing is performed by ultraviolet rays, crystallization is promoted inward from the surface of the non-single crystal semiconductor. Therefore, the sufficiently polycrystallized or single-crystallized impurity region near the surface can control the current flowing in the channel formation region in the immediate vicinity of the gate insulating film without any trouble. Light irradiation annealing - Upon le step, hydrogen or a halogen element added to the channel formation region is not affected at all, since it is possible to hold the non-single-crystal semiconductor state, the off-current to 1/10 ^{3 to} the single crystal semiconductor It can be 1/10 ⁵ .

Since the source region and the drain region are formed by optical annealing after forming the gate electrode, contaminants do not adhere to the interface of the gate insulator and the characteristics are stabilized. Further, as compared with the conventionally known method, not only quartz glass but also any substrate such as soda glass and heat resistant organic film can be used as the substrate material. The formation of the non-single-crystal semiconductor-gate insulator-gate electrode that forms the channel formation region, which is the interface of different materials, can be made by the process in the same reaction furnace without exposing to the atmosphere.
It has the feature that there are few interface depressions.

In this embodiment, it is important that the oxygen, carbon, and nitrogen of the non-single crystal semiconductor in the channel formation region all have an impurity concentration of 5 × 10 ¹⁸ cm ^-3 or less. That is, in the conventionally known insulated gate field effect semiconductor device, the channel layer has 1 to 3 ×.
It is mixed at a concentration of 10 ²⁰ cm ^-3 . The P-channel insulated gate field-effect semiconductor device using a non-single-crystal semiconductor according to this conventional example allows only a current of 1/3 or less of the characteristics of the insulated gate field-effect semiconductor device according to the present embodiment to flow. The hysteresis characteristic of the insulated gate field effect semiconductor device using the non-single-crystal semiconductor in the above-mentioned conventional example shows the I _DD ─V _GG characteristic and the drain electric field of 2 × 10 ⁶ V / c.
It was observed when adding more than m. In addition, as in this embodiment, oxygen in the non-single crystal semiconductor is 5 × 10 ¹⁸ cm ^−3.
Below, no hysteresis was observed even at a voltage of 3 × 10 ⁶ V / cm.

[0026]

According to the present invention, the source region and the drain region have a double structure of a semiconductor crystallized by the addition of impurities and a non-single-crystal semiconductor. It has both the property and the property of the non-single crystal semiconductor. For example, an insulated gate field effect semiconductor device for a liquid crystal display panel of the present invention responds to high speed switching characteristics by a crystallized semiconductor,
The non-single crystal semiconductor increases the breakdown voltage of the junction against the reverse bias. According to the present invention, the depth of crystallization from the surface of the impurity region is determined by controlling the scanning speed by ultraviolet light.

According to the present invention, impurities are added to all non-single-crystal semiconductor regions other than the portion masked by the gate portion, and this portion is then annealed by light. The single crystal semiconductor region is gone,
The insulated gate field effect semiconductor device for liquid crystal display panel has good switching characteristics at high frequency without hysteresis in gate voltage-drain current characteristics. According to the present invention, a plurality of insulated gate field-effects for liquid crystal display panels can be obtained by scanning light without selecting them one by one and scanning them with light even in a narrow area between pixel electrodes. A semiconductor device can be manufactured.

According to the present invention, since the channel formation region is activated by the addition of hydrogen or a halogen element, the high frequency switching characteristic of the insulated gate field effect semiconductor device for liquid crystal display panel is improved.
According to the present invention, since the addition of impurities or the optical annealing treatment is not selectively performed, a large number of, for example, 500 × 500 insulated gate field effect semiconductor devices for liquid crystal display panels are provided on one insulating substrate. be able to.

[Brief description of drawings]

1A to 1C are vertical sectional views of an insulated gate field effect semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a drain current-gate voltage characteristic according to an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Non-single-crystal semiconductor layer 3 ... Gate insulating film 4 ... Gate electrode 5 ... Area | region which forms an insulated gate field effect semiconductor device 6 ... Resist film 7, 8 ... Impurity region 10 ... Strong ultraviolet light 11, 11 '... Broken line 13, 13' ... Electrode hole 14, 14 '... Lead 15, 15' ... Source region and drain region Edges 16 and 16 '... Edges of gate electrode 17 and 17' ... Bonding interface

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location 9056-4M H01L 29/78 627 G

Claims (3)

[Claims] 1. A non-single-crystal semiconductor to which hydrogen or a halogen element is added to an insulating substrate, a gate insulating film formed on the non-single-crystal semiconductor, the gate insulating film, and a gate formed thereon. For a liquid crystal display panel, which comprises a gate region composed of electrodes, and a source region and a drain region which are crystallized by adding impurities to all non-single-crystal semiconductor regions except for a portion masked by the gate region In the insulated gate field effect semiconductor device, the source region and the drain region have a double structure including a semiconductor partially crystallized in the depth direction from the surface and a non-single-crystal semiconductor. A characteristic insulated gate field effect semiconductor device for a liquid crystal display panel. 2. A plurality of non-single-crystal semiconductor regions to which hydrogen or a halogen element is added, a gate insulating film formed on each of the plurality of non-single-crystal semiconductor regions, and a plurality of gate insulating films formed on the insulating substrate. A plurality of gate portions each formed of a gate electrode formed on the film, and a plurality of non-single-crystal semiconductor regions excluding the portion masked by the plurality of gate portions, which are crystallized by adding impurities In an insulated gate field effect semiconductor device for a liquid crystal display panel, which comprises a source region and a drain region of, the plurality of source regions and drain regions are semiconductors partially crystallized in a depth direction from a surface thereof. An insulated gate field effect semiconductor device for a liquid crystal display panel, which is characterized by having a double structure with a non-single crystal semiconductor. 3. A step of forming a non-single crystal semiconductor to which hydrogen or a halogen element is added on an insulating substrate, a step of forming a gate insulating film on the non-single crystal semiconductor, and a step of selectively forming on the gate insulating film. A step of forming a gate portion by forming a gate electrode on all of the non-single-crystal semiconductor regions except a portion masked by the gate portion, and a source region crystallized by adding an impurity; By forming a drain region and controlling the scanning speed of the annealing treatment by ultraviolet light over the entire source region and drain region using the gate portion as a mask, only a part in the depth direction from the surface in the impurity region A method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel, comprising: