JP3127441B2 - Method for manufacturing insulated gate field effect semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit,
From non-single-crystal semiconductor thin films used for liquid crystal display panels, etc.
And a method for manufacturing an insulated gate field effect semiconductor device. 2. Description of the Related Art In a field effect transistor disclosed in Japanese Patent Application Laid-Open No. 58-2073, a source region and a drain region are selectively annealed to form a polycrystalline region, and a channel forming region is made amorphous. Quality area. That is, the field effect transistor disclosed in the publication is
A part of the amorphous region is selectively made into a polycrystalline region by annealing. As described above, in a conventional insulated gate field effect semiconductor device, a channel forming region contains 1 to 3 × 10 ²⁰ cm ^{− of} oxygen, carbon, and nitrogen. ^It consisted of a non-single-crystal semiconductor layer containing about ^three . When any of oxygen, carbon, and nitrogen is contained at such a high concentration, the insulated gate field-effect semiconductor device is turned on and off when switching.
F "characteristic was bad. For example, as described above, in an insulated gate field effect semiconductor device using a non-single-crystal semiconductor containing oxygen, carbon, and nitrogen at such a high concentration, good “ON” and “OFF” The frequency characteristic showing the characteristic was about 1 KHz. In the conventional insulated gate field effect semiconductor device, since the source region and the drain region are selectively annealed, an uncrystallized portion always remains in the non-single-crystal semiconductor layer. When an uncrystallized region remains in the insulated gate field effect semiconductor device as described above, a part of the current also flows in the amorphous portion when the device operates as an insulated gate field effect semiconductor device. Since the amorphous part has a higher resistance than the crystallized part,
The current is difficult to flow, and once it flows in, it is stored and flows out slowly. That is, the insulated gate field-effect semiconductor device in the conventional example has a long lifetime in which current flows, and exhibits hysteresis characteristics. [0005] In order to solve the above problems, an object of the present invention is to provide a method of manufacturing an insulated gate type field effect semiconductor device which has good switching characteristics and can be used at a high frequency. In order to achieve the above object, a method of manufacturing an insulated gate field effect semiconductor device according to the present invention comprises a step of forming a source region (7) on an insulating surface on a substrate (1). ), A non-single-crystal semiconductor thin film including a drain region (8), a channel formation region, and a gate insulating film in contact with the channel formation region
(3) and a gate electrode (4) in contact with the gate insulating film (3)
Having on the substrate (1) having the insulating surface
Oxygen, carbon and nitrogen concentrations of 5 × 10 ¹⁸ cm each
Forming a non-single-crystal semiconductor thin film of ⁻³ or less, adding a P-type or N-type impurity to the non-single-crystal semiconductor thin film, and using a gate electrode as a mask, forming a linear shape having a length of 10 cm or more. The strong ultraviolet light is directed from one end of the substrate (1) to the other end in a direction substantially perpendicular to the longitudinal direction of the linear strong ultraviolet light.
scanning at a scanning speed of 50 cm / min to 50 cm / min, wherein the processing temperature of the step of scanning with the strong ultraviolet light is:
400 ° C. or lower, which promotes crystallization of the non-single-crystal semiconductor thin film to which impurities are added in the step. The method for manufacturing an insulated gate field effect semiconductor device of the present invention comprises the steps of: forming a source region (7) on an insulating surface on a substrate (1);
A drain region (8), a non-single-crystal semiconductor thin film including a channel forming region, a gate insulating film (3) in contact with the channel forming region, and a gate electrode (4) in contact with the gate insulating film (3). And an acid is placed on the substrate (1) having the insulating surface.
Concentration of element, carbon and nitrogen is 5 × 10 ¹⁸ cm ⁻³ each
Non-single-crystal semiconductor thin film containing amorphous structure
Mass forming a (2) a step of adding a P-type or N-type impurity into the non-single-crystal semiconductor thin film, a gate electrode
The linear strong ultraviolet light having a length of 10 cm or more is applied to the substrate in a direction substantially perpendicular to the longitudinal direction of the linear strong ultraviolet light.
5cm / min to 50cm from one end to the other end of (1)
And a step of scanning at a scanning rate of / min, and changing the crystal structure of the non-single-crystal semiconductor thin film (2) doped with impurities by the step of scanning with strong ultraviolet light from an amorphous structure to a polycrystalline structure. Features. It is characterized by doing. According to the present invention, a gate insulating film is formed on a non-single-crystal semiconductor to which no or very few impurities are added (hereinafter, a non-single-crystal semiconductor to which hydrogen or a halogen element is added is simply referred to as a semiconductor or a non-single-crystal semiconductor). An object and a gate electrode were selectively provided thereon. Further, using the gate electrode as a mask, impurities for the source region and the drain region, for example, phosphorus or arsenic for the N-channel type and boron for the P-channel type are added to the inside of the non-single-crystal semiconductor by an ion implantation method or the like. After that, the region to which the inert impurity is added is irradiated with strong light at a temperature of 400 ° C. or less, and is subjected to strong light annealing (hereinafter, simply referred to as light annealing) to form a hydrogen or halogen element. Is added and remains, and the semiconductor is transformed into a semiconductor whose crystallinity is promoted more than that of the channel formation region, in particular, a semiconductor having a remarkably polycrystalline or single crystal structure. That is, the present invention does not perform laser annealing after ion implantation on a conventionally known single crystal semiconductor to which hydrogen or a halogen element has not been added, but instead contains 1 atomic% or more of hydrogen or a halogen element, generally 5%. Ion implantation and intense light annealing of a non-single-crystal semiconductor doped to a concentration of at least 20 atomic%, and preferably scanning this light from one end of the substrate surface to the other. , The crystal growth is included in the process, and the crystallinity is promoted to form an impurity region. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The method of manufacturing an insulated gate field effect semiconductor device according to the present invention comprises forming a non-single-crystal semiconductor thin film on an insulating surface on a substrate, and then forming a non-single-crystal semiconductor thin film on the non-single-crystal semiconductor thin film. Or N-type impurities are added. Thereafter, in the method for manufacturing an insulated gate field effect semiconductor device according to the present invention, the substrate is irradiated with linear ultraviolet light having a length of 10 cm or more, and substantially perpendicular to the longitudinal direction of the linear ultraviolet light. The entire surface of the substrate is scanned in the direction from one end of the substrate to the other end at a scanning speed of 5 cm / min to 50 cm / min. By the above-described scanning process, the amorphous structure of the non-single-crystal semiconductor thin film changes to a polycrystalline structure. Ma
The processing temperature for scanning with the ultraviolet light is 400 ° C.
The following is an example of a non-single-crystal semiconductor thin film to which impurities are added.
Crystallization is promoted. In the insulated gate type field effect semiconductor device manufactured by the above method, the crystallinity of the source region and the drain region is higher than that of the channel forming region. As a result, the source region and the drain region can have lower electric resistance than the channel formation region, and can improve the ON characteristics of the insulated gate field effect semiconductor device. In addition, the source region and the drain region contain impurities throughout the non-single-crystal semiconductor thin film except for the channel formation region, have a region with low electric resistance over a wide area, and do not have an amorphous portion where current does not easily flow. Therefore, the current easily flows, and the switching does not flow during switching. In the method of manufacturing an insulated gate field effect semiconductor device according to the present invention, the concentrations of oxygen, carbon and nitrogen are reduced.
Respectively 5 × 10 ¹⁸ cm ^-3 or less, i.e. P-type or N-type impurity in the non-single-crystal semiconductor thin film as little as possible the element is added. The source region and the drain region are formed by promoting crystallization only in the region to which the impurity is added. The insulated gate field-effect semiconductor device having such a structure is characterized in that the conventional non-single-crystal semiconductor, for example, a non-single-crystal semiconductor containing 1 to 3 × 10 ²⁰ cm ⁻³ of oxygen, carbon, or nitrogen has a frequency of 1 KHz. Although the switching characteristics were such that the switching characteristics could be followed, good switching characteristics were obtained even at a frequency of 1 MHz. Further, insulated gate field effect semiconductor device, oxygen in the non-single-crystal semiconductor thin film, carbon and nitrogen
Is extremely low, each 5 × 10 ¹⁸ cm ⁻³ or less, and the non-single-crystal semiconductor thin films except the channel formation region are irradiated with strong ultraviolet light to promote crystallization from the source region and the drain region. As a result, the switching characteristics at higher frequencies are improved. In particular, by selectively annealing the source region and the drain region, crystallization can be promoted in all the non-single-crystal semiconductor layers other than the channel formation region. That is, in the insulated gate field effect semiconductor device of the present invention, since all the regions other than the channel forming region in the non-single-crystal semiconductor thin film are the source region and the drain region, the resistance of the amorphous portion is reduced. No high areas are left. As a result, in the insulated gate field effect semiconductor device of the present invention, the gate electrode is provided above the non-single-crystal semiconductor thin film forming the channel formation region on the substrate. The optical energy gap (in the case of a silicon semiconductor) of the non-single-crystal semiconductor thin film is 1.7 eV to 1.8 eV, whereas the optical energy gap of the source region and the drain region is 1.6 eV. It has almost the same optical energy gap as 1.8 eV. The source region and the drain region are
An active impurity region having the same energy gap as that of the non-single-crystal semiconductor thin film was obtained. Since the source region and the drain region have the same or substantially the same energy gap as the channel forming region, the "ON",
In response to "OFF", the ON current does not flow at the time of rising, and on the other hand, the current does not flow at the time of falling. That is, the insulated gate field effect semiconductor device of the present invention has a small off-state current and can perform "ON" and "OFF" with a high-speed response. Further, since the crystallinity of the source region and the drain region is higher than that of the channel formation region, the sheet resistance is clearly reduced, and large-area large-scale integration can be performed on one substrate.
Since the gate insulating film has a silicon nitride film formed in contact with the non-single-crystal semiconductor thin film , hydrogen or a halogen element in the non-single-crystal semiconductor is not easily degassed, and moisture enters the non-single-crystal semiconductor. hard. FIG. 1A to FIG. 1C are longitudinal sectional views of an insulated gate field effect semiconductor device according to an embodiment of the present invention. In FIG. 1, a substrate (1) is made of, for example, quartz glass and has a thickness of 1.1 m as shown in FIG.
m and the size was 10 cm × 10 cm. This board (1)
The upper surface of the substrate is plasma CVD of silane (SiH ₄ ) (high frequency 13.5
At 6 MHz and a substrate temperature of 210 ° C.), a non-single-crystal semiconductor (2) having an amorphous structure to which hydrogen was added at a concentration of 1 atomic% or more was formed to a thickness of 0.2 μm. Further, a gate insulating film (3) made of, for example, a silicon nitride film was formed on the upper surface of the non-single-crystal semiconductor (2) by a photo-CVD method.
That is, the gate insulating film (3) is made of disilane (Si ₂ H ₆ ) and ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ).
Reaction (low pressure mercury lamp with wavelength of 2537Å, substrate temperature 25
0 ° C) to convert Si ₃ N ₄ without using mercury sensitization.
It was made to a thickness of 1000 mm. Thereafter, the portion excluding the region (5) for forming the insulated gate field effect semiconductor device was removed by a plasma etching method. Plasma etching reaction is CF
₄ + O ₂ (5%) reactive gas was introduced, and a frequency of 13.56 MHz was applied to a parallel plate electrode (not shown).
Performed at room temperature. On the gate insulating film (3), a microcrystalline or polycrystalline semiconductor of N ⁺ conductivity type was laminated to a thickness of 0.3 μm. Undesired portions of the N ⁺ semiconductor film were removed by a photoetching method using the resist film (6). After that, this resist film (6) and the gate electrode of N ⁺ semiconductor (4)
Using the gate portion comprising as a mask, a region serving as a source and a drain is ion-implanted at 1 × 10 ²⁰ cm ^−3.
As shown in FIG. 1 (B), phosphorus was added to this concentration to form a pair of impurity regions (7) and (8). Further, after the resist film (6) of the gate electrode (4) is removed from the entire substrate (1), the substrate (1) is exposed to strong light (1).
Light annealing of 0) was performed. In other words, for an ultra-high pressure mercury lamp (output 5 KW, wavelength 250 to 600 nm, light diameter 15 mm, length 180 mm), use a parabolic reflector on the back side and use a quartz cylindrical lens (focal length 150 cm,
The light-irradiating portion was constituted by a light-collecting portion having a width of 2 mm and a length of 180 mm). The irradiation surface of the substrate (1) is 5
Scanning was performed at a speed of 50 cm / min to 50 cm / min, and the entire surface of the substrate 10 cm × 10 cm was irradiated with strong light (10). Thus, the gate electrode (4) absorbed light sufficiently and was polycrystallized because a large amount of phosphorus was added to the gate electrode (4) side. Further, the impurity regions (7) and (8) are scanned once by melting and recrystallizing, ie, X direction.
The melting and recrystallization were shifted (moved) in the directions. As a result, the crystal grain size could be increased due to the addition of a growth mechanism, compared to simply heating or irradiating the entire surface uniformly. The region crystallized by this intense light annealing is:
It is not necessary to reach all the regions under the impurity regions (7) and (8). In FIG. 1, as shown by broken lines (11) and (11 '), only the upper layer is crystallized at least and the impurity region is removed.
It is important to activate (7) and (8). Further, the end portions (15) and (15 ') of the source region and the drain region correspond to the end portions (16) and (1) of the gate electrode.
6 ') is provided so as to enter the channel region side. The channel forming region including the N-type impurity regions (7) and (8), the I-type non-single-crystal semiconductor region (2), the junction interface (17) and (17 ') is a non-single-crystal region in the I-type semiconductor region. It has a hybrid structure composed of a semiconductor and a crystallized semiconductor entering from an impurity region. The degree of the crystallized semiconductor in the I-type semiconductor region is determined by the scanning speed and intensity (illuminance) of the optical annealing. After the step of FIG. 1B, the polyimide resin is coated on the entire surface to a thickness of 2 μm. Then, after the electrode holes (13) and (13 ') are formed in the polyimide resin,
Aluminum ohmic contacts and their leads (1)
4) and (14 ') are formed. This second layer leads (14), (1
4 ′) may be connected to the gate electrode (4) when formed. The result of this light annealing is that the sheet resistance is 4 × 10 ⁻³ (ohm cm) ⁻¹ to 1 × 10 ⁺² (ohm cm) before light irradiation.
It became ^-1 , and the electric conductivity characteristics were improved compared to before the light annealing. FIG. 2 is a graph showing characteristics of drain current / gate voltage according to the embodiment of the present invention. When the length of the channel forming region is 3 μm and 10 μm, the channel width is 1 μm.
2 under the condition of mm.
As shown by 1) and (22), V _th = + 2V, V _DD =
A current of 1 × 10 ⁻⁵ A and 2 × 10 ⁻⁵ A was obtained at 10V. In addition,
The off-state current was (V _GG = 0 V) 10 ^-10 to 10 ^-11 (A), which was smaller by a factor of 10 ^-4 than 10 ^-6 (A) of a single crystal semiconductor. This embodiment employs a manufacturing process in which a film is gradually formed and processed from below, so that large-area large-scale integration can be performed. Therefore, large area, for example, 30
It is possible to manufacture even 500 × 500 insulated gate field effect semiconductor devices in a cm × 30 cm panel, and it can be applied as an insulated gate field effect semiconductor device for controlling liquid crystal display elements. Was. Since the low-temperature treatment is performed at a temperature of 400 ° C. or less by the photo-annealing process, it is possible to prevent a polycrystalline or single-crystal semiconductor from releasing hydrogen or a halogen element therein. The optical annealing was not performed simultaneously on the entire surface of the substrate, but was scanned from one end to the other end. Therefore, light emitted from the cylindrical ultra-high pressure mercury lamp was condensed linearly by a parabolic mirror and a quartz lens. Then, the light condensed in the form of a line could scan the substrate in a direction perpendicular to the linear direction, thereby optically annealing the surface of the non-single-crystal semiconductor. Since this photo annealing is performed with ultraviolet rays,
The crystallization from the surface of the non-single-crystal semiconductor to the inside was promoted. For this reason, in the impurity region near the surface that has been sufficiently polycrystallized or monocrystallized, it is possible to control the current flowing very close to the gate insulating film in the channel formation region without any trouble. Light irradiation annealing - Upon le step, hydrogen or a halogen element added to the channel formation region is not affected at all, since it is possible to hold the non-single-crystal semiconductor state, the off-current to 1/10 ^{3 to} the single crystal semiconductor
Can be 1/10 ⁵ Since the source region and the drain region are formed by photo annealing after forming the gate electrode, the characteristics are stabilized without contamination adhered to the gate insulator interface. Further, as compared with a conventionally known method, not only quartz glass as a substrate material but also an arbitrary substrate
Douglas and heat-resistant organic films can also be used. The formation of the non-single-crystal semiconductor, the gate insulator, and the gate electrode that form the channel formation region, which is the interface between dissimilar materials, can be made without exposure to the atmosphere by a process in the same reaction furnace. The feature is that there is little. In this embodiment, it is important that all of oxygen, carbon and nitrogen of the non-single-crystal semiconductor in the channel formation region have an impurity concentration of 5 × 10 ¹⁸ cm ⁻³ or less. That is, in the conventionally known insulated gate field effect semiconductor device, 1 to 3 ×
It is mixed to a concentration of 10 ²⁰ cm ^-3 . The P-channel insulated-gate field-effect semiconductor device using a non-single-crystal semiconductor according to the conventional example flows only a current of 1/3 or less of the characteristics of the insulated-gate field-effect transistor device according to the present embodiment. The hysteresis characteristic of the insulated gate field effect semiconductor device using a non-single-crystal semiconductor in the above-described conventional example is such that the drain electric field is 2 × 10 in the I _DD ─V _GG characteristic.
It was observed when applying more than ⁶ V / cm. Also,
As in this embodiment, oxygen in the non-single-crystal semiconductor is reduced to 5 × 10 ¹⁸
At a voltage of 3 cm ³ or less, no hysteresis was observed even at a voltage of 3 × 10 ⁶ V / cm. [0026] According to the present invention, further a linear intensity ultraviolet light non-single-crystal semiconductor thin film of more than 10cm length other than the channel formation region, the linear strong ultraviolet light At a scanning speed of 5 cm / min to 50 cm / min from one end of the substrate to the other end in a direction substantially perpendicular to the longitudinal direction, and the processing temperature was set to 400 ° C. or less, the non-single-crystal semiconductor thin film Hydrogen does not degas. According to the present invention, the insulated gate field-effect semiconductor device is characterized in that oxygen and carbon in a non-single-crystal semiconductor thin film
And 5 × 10 ¹⁸ cm ^-3 hereinafter each concentration of oxygen and nitrogen, because of the extremely small, the gate voltage - drain current
There is no hysteresis in the characteristics and the switch at high frequencies
Good chining characteristics.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A to 1C are longitudinal sectional views of an insulated gate field effect semiconductor device according to one embodiment of the present invention. FIG. 2 is a graph showing characteristics of drain current─gate voltage according to an embodiment of the present invention. [Description of Signs] 1 ... Substrate 2 ... Non-single-crystal semiconductor layer 3 ... Gate insulating film 4 ... Gate electrode 5 ... Area 6 for forming an insulated gate type field effect semiconductor device ... Resist films 7, 8 Impurity region 10 Strong light 11, 11 'Broken line 13, 13' Hole 14, 14 'Lead 15, 15' Source region And end portions 16 and 16 'of the drain region and end portions 17 and 17' of the gate electrode.

Claims (1)

(57) [Claims] The source region, the drain region,
A method for manufacturing an insulated gate field effect semiconductor device, comprising: a non-single-crystal semiconductor thin film including a channel formation region; a gate insulating film in contact with the channel formation region; and a gate electrode in contact with the gate insulating film. Oxygen, carbon and nitrogen on a substrate with a surface
Forming a concentration of 5 × 10 ¹⁸ cm ^-3 or less of a non-single-crystal semiconductor thin film, respectively, and adding a P-type or N-type impurity into the non-single-crystal semiconductor thin film, a gate electrode as a mask, 10 cm The linear intense ultraviolet light having the above length is scanned at a scanning speed of 5 cm / min to 50 cm / min from one end to the other end of the substrate in a direction substantially perpendicular to the longitudinal direction of the linear intense ultraviolet light. Scanning step, wherein the processing temperature of the step of scanning with the strong ultraviolet light is 400 ° C.
A method for manufacturing an insulated-gate field-effect semiconductor device, which promotes crystallization of a non-single-crystal semiconductor thin film to which an impurity is added by the step. 2. The source region, the drain region,
A method for manufacturing an insulated gate field effect semiconductor device, comprising: a non-single-crystal semiconductor thin film including a channel formation region; a gate insulating film in contact with the channel formation region; and a gate electrode in contact with the gate insulating film. Oxygen, carbon and nitrogen on a substrate with a surface
Amorpha each having a concentration of 5 × 10 ¹⁸ cm ⁻³ or less
Forming a non-single-crystal semiconductor thin film including a non-single-crystal semiconductor film, adding a P-type or N-type impurity to the non-single-crystal semiconductor thin film, and using a gate electrode as a mask, forming a linear line having a length of 10 cm or more. the intensity ultraviolet light, to no 5 cm / min from one end to the other end of the substrate in the direction substantially perpendicular to the longitudinal direction of the linear strong ultraviolet light and a step of scanning at a scan rate of 50 cm / min, A method for manufacturing an insulated gate field effect semiconductor device, comprising: changing a crystal structure of a non-single-crystal semiconductor thin film to which impurities are added by the step of scanning with strong ultraviolet light from an amorphous structure to a polycrystalline structure.