JP3401533B2 - LCD panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] The present invention relates to a personal computer.
Display devices for computers, word processors, or electronic devices.
The present invention relates to a liquid crystal display panel used for a display. [0002] 2. Description of the Related Art Japanese Patent Laid-Open Publication No.
Field-effect transistor has a source region and a drain
Selective annealing of the active region
In addition, the channel formation region is an amorphous region. Sand
That is, the field-effect transistor disclosed in the publication is
Selectively anneal a part of amorphous region to polycrystalline region
Area. [0003] As described above, the conventional
Channel formation in insulated gate field effect semiconductor devices
The region is one in which oxygen, carbon, and nitrogen are all 1 to
3 × 10²⁰cm^-3Composed of non-single-crystal semiconductor layers containing
Was. All of oxygen, carbon, and nitrogen are
If it is contained at a high concentration, the
The conductor device is set to “ON” or “OF” when switching.
F "characteristic was bad. To solve the above problems
Further, the present invention provides an oxygen concentration in a channel formation region.And
And carbon concentrationIs 5 × 10¹⁸cm^-3By:
Eliminates drain current-gate voltage characteristic hysteresis.
Combination to obtain good display characteristics and switch at high frequencies
It is possible to perform ching. For example, as described above, oxygen, carbon, and
And nitrogen at such high concentrations
Insulated gate field effect semiconductor device using non-single-crystal semiconductor
In the device, a circuit that shows good "ON" and "OFF" characteristics
The wave number characteristic was about 1 KHz. A conventional insulated gate field effect semiconductor
The device selectively anisolates the source and drain regions.
Is crystallized into a non-single-crystal semiconductor layer.
Missing parts always remain. Insulated gate field effect
If uncrystallized regions remain in the semiconductor device
When operating as an insulated gate field effect semiconductor device
Then, a part of the current also flows through this amorphous portion. [0006] The amorphous part is compared with the crystallized part.
Current is difficult to flow and flows once
And it is slow to flow out. That is, in the conventional example,
Gate type field effect semiconductor device in which current flows
Long lifetime and hysteresis characteristics. [0007] To solve the above problems, the present invention
Ming has good switching characteristics and can be used at high frequencies.
Liquid crystal display using insulated gate field effect semiconductor device
The purpose is to provide a panel. [0008] [MEANS FOR SOLVING THE PROBLEMS] To achieve the above object
In addition, the liquid crystal display panel of the present invention has an insulating surface on the substrate (1).
Using an insulated gate field effect semiconductor device provided in
And the insulated gate field effect semiconductor device
Is the source region (7), drain region (8), channel formation
A non-single-crystal semiconductor layer including a region, and the channel formation region
The gate insulating film (3) in contact with the gate insulating film (3);
A gate electrode (4) in contact with the channel forming region;
Is oxygenConcentration and carbon concentrationIs 5 × 10¹⁸cm^-3Below
The non-single-crystal semiconductor layer, the gate insulating film (3) and
And the gate electrode (4) is covered with a resin layer,
The source region (7) with a hole provided in the resin layer
Is provided with an electrode electrically connected to the drain region (8).
It is characterized by having been done. Liquid crystal display panel of the present invention
Is an insulated gate electrode provided on the insulating surface on the substrate (1).
Using a field effect semiconductor device, wherein the insulating gate
The field-effect semiconductor device has a source region (7), a drain
Region (8), a non-single-crystal semiconductor layer including a channel formation region
And a gate including a silicon nitride film in contact with the channel formation region.
Gate insulating film (3) and a gate in contact with the gate insulating film (3).
And the channel forming region has oxygen.concentration
And carbon concentrationIs 5 × 10¹⁸cm^-3The following is the non-unit
Crystal semiconductor layer, the gate insulating film (3) and the gate
The electrode (4) is covered with a resin layer, and the resin layer is formed on the resin layer.
Holes in the source region (7) or drain region
Electrodes electrically connected to the zone (8) are provided
It is characterized by. The liquid crystal display panel of the present invention is formed on a substrate (1).
Insulated gate field effect semiconductor device
The insulated gate field effect half.
The conductor device includes a source region (7), a drain region (8), and a channel.
A tunnel forming region is provided, and the
A single crystal semiconductor layer and a gate in contact with the channel formation region;
Gate insulating film (3) and a gate in contact with the gate insulating film (3)
An electrode (4), wherein the channel forming region is oxygenConcentration
And carbon concentrationIs 5 × 10¹⁸cm^-3The following amorphous silicon
A non-single-crystal semiconductor layer;
The gate insulating film (3) and the gate electrode (4) are covered with a resin layer.
The hole is provided on the resin layer on the resin layer.
Electrically connected to source region (7) or drain region (8)
Is provided. The present invention
LCD panel is provided on an insulating surface on the substrate (1).
Using an insulated gate type field effect semiconductor device.
Thus, the insulated gate field effect semiconductor device has a source region.
Region (7), a drain region (8), and a channel formation region.
A non-single-crystal semiconductor layer containing hydrogen or halogen,
The gate insulation including the silicon nitride film in contact with the channel formation region
Edge electrode (3) and gate electrode in contact with the gate insulating film (3)
(4) wherein the channel forming region is oxygenConcentration and
Carbon concentrationIs 5 × 10¹⁸cm^-3The following amorphous silicon
The non-single-crystal semiconductor layer and the gate
The insulating film (3) and the gate electrode (4) are covered with a resin layer
And a hole provided in the resin layer on the resin layer.
Source region (7) or drain region (8).
Characterized in that an electrode provided is provided. In the liquid crystal display panel of the present invention,
The fat layer is made of polyimide.Liquid of the present invention
In the crystal display panel, the substrate is made of quartz, glass, or
Or organic film In the liquid crystal display panel of the present invention, the software
Source and drain regions must be made of polycrystalline semiconductor
It is characterized by. In the liquid crystal display panel of the present invention,
Nitrogen in channel formation regionconcentrationIs 5 × 10¹⁸cm^-3Below
A liquid crystal display panel. Liquid crystal display of the present invention
In the panel, the channel formation region is formed of hydrogen or ha.
It is characterized in that the logen is at least 1 atomic%. [0011] The present invention is characterized by the absence or addition of impurities.
Very few non-single-crystal semiconductors (hereinafter referred to as hydrogen or halogen
A non-single-crystal semiconductor to which an element is added
Abbreviated as single crystal semiconductor)
A gate electrode was selectively provided thereon. In addition, this gate
Using the electrode as a mask, the source region and the
And impurity for drain region, for example, N-channel type
Non-single bond of phosphorus or arsenic for P-channel type
Was added inside the crystalline semiconductor. Thereafter, this inert impurity is added.
Intense light irradiation at a temperature of 400 ° C. or less
Light annealing (hereinafter simply referred to as light annealing)
Element or halogen element remains and the crystallinity
Semiconductors that have been promoted more than channel-forming regions, especially significantly
Has been transformed into a polycrystalline or single crystal semiconductor
It is characterized by the following. That is, the present invention relates to a conventional hydrogen
Or for single-crystal semiconductors without the addition of halogen elements
On the other hand, laser annealing should not be performed after ion implantation.
More than 1 atomic% of hydrogen or halogen elements, generally
Non-simple added at a concentration of 5 to 20 atomic%
Ion implantation into crystalline semiconductors
And preferably the light is directed from the substrate surface to one end.
Includes crystal growth in the process by scanning to the other end
In this case, the crystallinity is promoted to form an impurity region. [0014] DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display panel according to the present invention
For example, from quartz, glass, or organic film
Source region, drain region, chip
A non-single-crystal semiconductor including a channel forming region is formed;
A gate insulating film in contact with a channel formation region, and the gate
A gate electrode in contact with the insulating film is provided. Also,
On the gate electrode, for example, made of polyimide
A resin layer is provided, and the resin layer is formed on the resin layer.
The source region or the drain region with a hole provided in
Electrically connected electrodes are provided. The non-single-crystal semiconductor includes a P-type or N-type
Impurities are added. Then, the liquid in the present invention
The crystal display panel is longer than 10 cm with respect to the substrate.
Irradiation of linear ultraviolet light of
5cm / min to 50c from one end to the other in the angular direction
Scan at a scanning speed of m / min. For the above scanning process
Therefore, the amorphous structure of the non-single-crystal semiconductor has many
Change to crystal structure. An insulated gate type manufactured by the above method
The field effect semiconductor device has a source region and a drain region.
Have higher crystallinity than the channel formation region. That
As a result, the source and drain regions form a channel.
The electric resistance can be lower than the
ON characteristics of the field effect semiconductor device can be improved.
You. In addition, the source region and the drain region
The entire region of the non-single-crystal semiconductor layer except for the formation region contains impurities.
Area with low electrical resistance over a large area.
Current does not flow.
Easy, no wobble during switching. The insulating gate of the liquid crystal display panel according to the present invention
The field-effect semiconductor device has oxygen, carbon, or nitrogen.
5 × 10¹⁸cm^-3Below, that is, as much as possible
P-type or N-type impurities in the reduced non-single-crystal semiconductor layer
Has been added. And the region where this impurity is added
Only the crystallization promotes the source and drain regions
Are formed. Insulated gate type with this configuration
The field-effect semiconductor device is a non-single-crystal semiconductor
1 to 3 × 1 body, eg, oxygen, carbon, or nitrogen
0²⁰cm^-3Is a non-single-crystal semiconductor at a frequency of 1 KHz
While the switching characteristics were just enough to follow
Good switching characteristics even at 1MHz frequency
I got sex. Also, an insulated gate field effect semiconductor device
Represents oxygen, carbon, or nitrogen in the non-single-crystal semiconductor layer
Is 5 × 10¹⁸cm^-3The following and extremely few channels
All non-single-crystal semiconductor layers excluding the formation region are irradiated with strong ultraviolet light.
Source regions that promoted crystallization by
Higher frequency because it is formed from the drain region
Switching performance in number was improved. In particular, saw
Selective annealing of the source and drain regions
All non-channel regions except for the channel formation region
Crystallization can be promoted in the single crystal semiconductor layer. That is, the liquid crystal display panel of the present invention
Insulated gate field-effect semiconductor device is a non-single-crystal semiconductor
All regions of the layer except the channel formation region are source
Amorphous region
No high-resistance area is left. As a result, the present invention
Gate-type field-effect semiconductor in LCD panels of Japan
In the device, the gate electrode forms the channel formation area on the substrate
Above the non-single-crystal semiconductor layer. Further, the optical energy of the non-single-crystal semiconductor layer
The energy gap (in the case of a silicon semiconductor) is 1.7 eV
Although the source voltage is 1.8 eV, the source region and the
The optical energy gap in the rain region is 1.6 eV
Almost the same optical energy gap as 1.8 eV
Have. The source region and the drain region are
It is the same as the energy gap of the non-single-crystal semiconductor layer.
In both cases, active impurity regions could be obtained. The source and drain regions are channel
Energy gap that is the same or nearly the same as the
Therefore, the "ON" of the insulated gate field effect semiconductor device,
On-current did not flow at the time of rise for "OFF"
On the other hand, when the current falls,
No. That is, the insulated gate field effect semiconductor device of the present invention
The device has low off-current and “ON” and “OFF”
High-speed response was possible. The connection between the source region and the drain region
Because the crystallinity was higher than the channel formation area,
Resistance is clearly lower, large area and large scale on one board
Integration has become possible. The gate insulating film is non-
A silicon nitride film is formed in contact with the single crystal semiconductor layer.
Degass hydrogen or halogen elements in non-single-crystal semiconductors
In addition, it is difficult for moisture to enter the non-single-crystal semiconductor. [0023] [Embodiment] FIGS. 1A to 1C show an embodiment of the present invention.
Longitudinal sectional view of an insulated gate field effect semiconductor device according to an embodiment.
Is shown. In FIG. 1, a substrate (1) is, for example, a quartz glass.
As shown in FIG. 1 (A), the thickness is 1.1 m.
m and the size was 10 cm × 10 cm. This board (1)
Silane (SiH_Four) Plasma CVD (high frequency 13.5
(6 MHz, substrate temperature 210 ° C)
Non-single-crystal semiconducting with highly doped amorphous structure
The body (2) was formed to a thickness of 0.2 μm. Further, the upper surface of the non-single-crystal semiconductor (2)
Is a gate made of, for example, a silicon nitride film by an optical CVD method.
The insulating film (3) is laminated. That is, the gate insulating film
(3) is disilane (Si_TwoH₆) And ammonia (NH_Three),
Or hydrazine (N_TwoH_Four) Reaction (wavelength of 2537Å)
Low-pressure mercury lamp with a substrate temperature of 250 ° C)_ThreeN_FourTo
Fabricated to a thickness of 1000 mm without using mercury sensitization
Was. Thereafter, an insulated gate field effect semiconductor device
Excluding the region (5) where
It was removed by the rubbing method. Plasma etching reaction is CF
_Four+ O_Two(5%) reactive gas is introduced and shown
13.56MHz frequency is applied to the parallel plate electrode which is not
Performed at room temperature. On the gate insulating film (3), N⁺Of conductivity type
Microcrystalline or polycrystalline semiconductor layered to a thickness of 0.3 μm
Was. This N⁺The semiconductor film is formed using a resist film (6).
Undesired portions were removed by photo etching. That
Later, this resist film (6) and N⁺Semiconductor gate electrode (4) and
Using the gate portion consisting of
1 × 10²⁰cm^-3of
Phosphorus was added to the concentration as shown in FIG.
Pure areas (7) and (8). Further, the substrate (1) is
After the resist film (6) on the gate electrode (4) is removed,
Light annealing of 0) was performed. That is, an ultra-high pressure mercury lamp
(Output 5KW, wavelength 250-600nm, light diameter 15mm, length
(180 mm) on the back side using a parabolic reflector.
Towards a quartz cylindrical lens (focal length 150 cm,
(Condenser part width 2mm, length 180mm)
Was configured. The irradiation surface of the substrate (1) is 5
Scan at a speed of 50 cm / min to 50 cm / min.
And the entire surface of the substrate 10cm x 10cm is irradiated with strong light (10).
I did it. Thus, the gate electrode (4) is
Since a large amount of phosphorus is added to the pole (4) side, sufficient light
Absorbed and polycrystallized. The impurity regions (7) and (8) are once melted.
Scanning direction by recrystallization, ie, X
The melting and recrystallization were shifted (moved) in the directions. The result
As a result, compared to simply heating or irradiating the entire surface uniformly,
In addition, it is necessary to increase the crystal grain size because the growth mechanism is added.
did it. The region crystallized by this intense light annealing is:
It is necessary to extend all the regions under the impurity regions (7) and (8).
Absent. In FIG. 1, as indicated by broken lines (11) and (11 ')
Only the upper layer is crystallized at least and the impurity region
It is important to activate (7) and (8). Further, the source region and the drain region
The ends (15) and (15 ') of the region are the ends (16) and (1
6 ') is provided so as to enter the channel region side.
ing. Then, the N-type impurity regions (7), (8),
A chip consisting of a crystalline semiconductor region (2), a junction interface (17), and (17 ')
The channel formation region is a non-single-crystal half in the I-type semiconductor region.
Crystallized semiconductors entering from conductors and impurity regions
It has a hybrid structure composed of This type I
The extent of the crystallized semiconductor in the semiconductor region depends on the optical annealing
It is determined by the scanning speed and intensity (illuminance). After the step of FIG. 1B, the polyimide resin
Is coated on the entire surface to a thickness of 2 μm. And poly
After the electrode holes (13) and (13 ') are formed in the imide resin,
Aluminum ohmic contacts and leads (1)
4) and (14 ') are formed. This second layer leads (14), (1
4 ') may be connected to the gate electrode (4) when forming.
No. The result of this light annealing is that the sheet resistance is
4 × 10^-3(Ohm cm) ^-1From 1 × 10⁺²(Ohm cm)
^-1And improved electrical conductivity characteristics compared to before light annealing.
Was. FIG. 2 shows a drain current according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating characteristics of a gate voltage. Channel formation area
Is 3 μm and 10 μm, the channel width is 1 μm.
2 under the condition of mm.
1), as indicated by (22), V_th= + 2V, V_DD=
1 × 10 at 10V^-FiveA, 2 × 10^-FiveA current was obtained. In addition,
The off current is (V_GG= 0V) 10^-TenOr 10^-11(A)
Of single crystal semiconductor^-610 compared to (A)^-FourIs one part smaller?
Was. In this embodiment, a film is gradually formed from the lower side and added.
Large-scale large-scale collection
It is now possible to perform integration. Therefore, large area example
For example, 500 pieces x 500 pieces in a 30cm x 30cm panel
Even the fabrication of insulated gate field effect semiconductor devices is possible.
Insulated gate type electric field for controlling liquid crystal display elements
It could be applied as an effect semiconductor device. Low temperature of 400 ° C. or less by photo annealing process
Polycrystalline or single-crystal semiconductor due to temperature treatment
Release hydrogen or halogen elements inside
Could be prevented. Also, light annealing is applied to the entire surface of the substrate.
Scan from one end to the other end
I let you. For this reason, light emitted from a cylindrical ultra-high pressure mercury lamp
Is focused linearly by a parabolic mirror and a quartz lens.
Was. The light condensed in this linear shape is orthogonal to
Non-single-crystal semiconductor surface by scanning the substrate in different directions
Was light annealed. This photo annealing is performed by ultraviolet rays.
Promotes crystallization from the surface of a non-single-crystal semiconductor inward
I let you. For this reason, it was sufficiently polycrystallized or single crystallized.
The impurity region near the surface is a region in the channel formation region.
Control the current flowing very close to the gate insulating film without any problem.
It is now possible. In the light irradiation annealing process, a channel is formed.
Hydrogen or halogen elements added to the region
Unaffected and can maintain the state of non-single-crystal semiconductor
Off-current is 1/10 that of a single-crystal semiconductor.^ThreeOr 1/10^FiveNasu
Can be The source and drain regions are
After the gate electrode is made, the gate is
(G) Stabilize the characteristics without contaminants adhering to the insulator interface. Further, compared to the conventionally known method, the substrate
As a material, not only quartz glass but also any substrate
Douglas, heat-resistant organic film can also be used
You. Non-constituting channel forming regions, which are interfaces between different materials
The formation of the single crystal semiconductor ─ gate insulator ─ gate electrode is the same
Exposure to the atmosphere by a process in one reactor
Feature that there is little generation of interface levels
Having. In this embodiment, the channel forming region
Oxygen, carbon and nitrogen in the non-single crystal semiconductor
Is 5 × 10¹⁸cm^-3It is important that the impurity concentration below
is there. That is, these are conventionally known insulated gate electric fields.
In an effect semiconductor device, 1 to 3 ×
Ten²⁰cm^-3Mixed to a concentration of. In this conventional example
P-channel insulated-gate electric field using non-single-crystal semiconductor
The effect semiconductor device is an insulated gate type electric field in this embodiment.
Current of 1/3 or less of the characteristics of the effect transistor device
Only flows. The non-single-crystal semiconductor in the above conventional example
Of insulated gate field effect semiconductor device using insulator
The cis characteristic is I_DD─V_GG2 × 10 drain electric field⁶V
/ cm was observed when added. Also book
As in the embodiment, oxygen in the non-single-crystal semiconductor is reduced to 5 × 10¹⁸c
m^-3The following is 3 × 10⁶Even at a voltage of V / cm
No presence of steresis was observed. BookExampleAccording to the source area and the drain
The in-region has a higher crystallinity than the channel formation region.
ON characteristics of the insulated gate field effect semiconductor device
Can be improved. BookExampleAccording to the source region and
And drain region are non-single-crystal
Since the entire semiconductor layer contains impurities, current flows
Easy, no wobble during switching. BookExampleAccording to the acid on the insulating substrate surface
Elemental, carbon or nitrogen is 5 × 10¹⁸cm^-3Less than
Channel formation region in the least non-single-crystal semiconductor layer
The source region and the drain region.
P-type or N-type impurities are added to the entire
Since the crystallinity is higher than that of the
No hysteresis in voltage-drain current characteristics, high frequency
Good switching characteristics in number were obtained. BookExampleAccording to the channel formation area
Non-single-crystal semiconductor layer outside the region is linear with a length of 10 cm or more
By strong ultraviolet light consisting of
5 cm / min to 50 from one end to the other in a right angle direction
All crystallized by scanning at a scanning speed of cm / min
Of insulated gate field effect semiconductor devices
Switching characteristics are better at high frequencies
became. BookExampleAccording to the channel formation region and the ratio
The crystallinity of the source and drain regions
As a result, sheet resistance is reduced, and large-area large-scale integration
Was able to do. According to this embodiment, the contact with the non-single-crystal semiconductor layer is achieved.
The gate insulating film on which the silicon nitride film is formed
Hydrogen or halogen elements in the crystalline semiconductor are difficult to degas,
And it is hard for moisture to enter. According to the present invention, in the channel forming region,
Oxygen concentrationAnd carbon concentrationIs 5 × 10¹⁸cm^-3And
The drain current-gate voltage characteristics
Eliminates the effect of steeresis and obtains good display characteristics.
Switching at a frequency becomes possible.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A to 1C are longitudinal sectional views of an insulated gate field effect semiconductor device according to one embodiment of the present invention. FIG. 2 is a graph showing characteristics of drain current─gate voltage according to an embodiment of the present invention. [Description of Signs] 1 ... Substrate 2 ... Non-single-crystal semiconductor layer 3 ... Gate insulating film 4 ... Gate electrode 5 ... Area 6 for forming an insulated gate type field effect semiconductor device ... Resist films 7, 8 Impurity region 10 Strong light 11, 11 'Broken line 13, 13' Hole 14, 14 'Lead 15, 15' Source region And end portions 16 and 16 'of the drain region and end portions 17 and 17' of the gate electrode.

Continuation of the front page (56) References JP-A-55-50663 (JP, A) JP-A-56-80138 (JP, A) JP-A-56-108231 (JP, A) JP-A-57-91517 (JP) JP-A-58-2073 (JP, A) JP-A-58-27364 (JP, A) JP-A-58-28867 (JP, A) JP-A-58-93277 (JP, A) 58-127382 (JP, A) JP-A-58-192379 (JP, A) JP-A-58-197775 (JP, A) JP-A-58-206121 (JP, A) JP-A-59-35423 (JP, A A) JP-A-59-75670 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/20 H01L 21/205 H01L 21/265- 21/268 G02F 1/1368

Claims (1)

(57) [Claims] A liquid crystal display panel using an insulated gate field effect semiconductor device provided on an insulating surface on a substrate, wherein the insulated gate field effect semiconductor device includes a source region, a drain region, and a channel formation region.
Except for the channel forming region,
A non-single-crystal semiconductor layer that has promoted crystallization, a gate insulating film in contact with the channel formation region, and a gate electrode in contact with the gate insulating film, wherein the oxygen concentration , the nitrogen concentration, and the carbon concentration in the channel formation region are higher. is at most 5 × 10 ¹⁸ cm ^-3, respectively, the non-single-crystal semiconductor layer, the gate insulating film and the gate electrode is covered with the resin layer, the source region or the at holes provided in front Symbol resin layer < An electrode electrically connected to the drain region is formed on the resin layer.
A liquid crystal display panel provided on the liquid crystal display panel. 2. A liquid crystal display panel using an insulated gate field effect semiconductor device provided on an insulating surface on a substrate, wherein the insulated gate field effect semiconductor device includes a source region, a drain region, and a channel formation region.
Except for the channel forming region,
It includes a non-single-crystal semiconductor layer which is conducive to crystallization, a gate insulating film including a silicon nitride film in contact with the channel forming region, and a gate electrode in contact with the gate insulating film, the oxygen concentration of the channel formation region, a nitrogen concentration and the carbon concentration is not more than 5 × 10 ¹⁸ cm ^-3, respectively, the non-single-crystal semiconductor layer, the gate insulating film and the gate electrode is covered with the resin layer, wherein in holes provided in front Symbol resin layer source region or the <br/> drain region and electrically connected to the electrodes, the resin layer
A liquid crystal display panel provided on the liquid crystal display panel. 3. A liquid crystal display panel using an insulated gate field effect semiconductor device provided on an insulating surface on a substrate, wherein the insulated gate field effect semiconductor device includes a source region, a drain region, and a channel formation region.
Except for the channel forming region,
Non-single-crystal half containing hydrogen or halogen that promoted crystallization
A conductive layer, a gate insulating film in contact with the channel forming region, and a gate electrode in contact with the gate insulating film, wherein the oxygen concentration , the nitrogen concentration, and the carbon concentration in the channel forming region are each 5 × 10 ¹⁸ cm ^−3. It comprises a region consisting of the following amorphous silicon, wherein the non-single-crystal semiconductor layer, the gate insulating film and the gate electrode is covered with the resin layer, the source region or the at holes provided in front Symbol resin layer <br / > drain region and electrically connected to the electrodes, the resin layer
A liquid crystal display panel provided on the liquid crystal display panel. 4. A liquid crystal display panel using an insulated gate field effect semiconductor device provided on an insulating surface on a substrate, wherein the insulated gate field effect semiconductor device includes a source region, a drain region, and a channel formation region.
Except for the channel forming region,
Non-single-crystal half containing hydrogen or halogen that promoted crystallization
A conductive layer, a gate insulating film including a silicon nitride film in contact with the channel formation region, and a gate electrode in contact with the gate insulating film, wherein the oxygen concentration , the nitrogen concentration, and the carbon concentration of the channel formation region are each 5 × 10 ¹⁸ cm ^-3 comprises a region consisting of the following amorphous silicon, wherein the non-single-crystal semiconductor layer, the gate insulating film and the gate electrode is covered with the resin layer, the source region in holes provided in the prior SL resin layer or the <br/> drain region and electrically connected to the electrodes, the resin layer
A liquid crystal display panel provided on the liquid crystal display panel.