JPS5961033A - 高融点金属シリサイド層の形成方法 - Google Patents

高融点金属シリサイド層の形成方法

Info

Publication number
JPS5961033A
JPS5961033A JP16953582A JP16953582A JPS5961033A JP S5961033 A JPS5961033 A JP S5961033A JP 16953582 A JP16953582 A JP 16953582A JP 16953582 A JP16953582 A JP 16953582A JP S5961033 A JPS5961033 A JP S5961033A
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
melting point
high melting
point metal
silicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16953582A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0377658B2 (enrdf_load_stackoverflow
Inventor
Yoshimi Shiotani
喜美 塩谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16953582A priority Critical patent/JPS5961033A/ja
Publication of JPS5961033A publication Critical patent/JPS5961033A/ja
Publication of JPH0377658B2 publication Critical patent/JPH0377658B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP16953582A 1982-09-30 1982-09-30 高融点金属シリサイド層の形成方法 Granted JPS5961033A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16953582A JPS5961033A (ja) 1982-09-30 1982-09-30 高融点金属シリサイド層の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16953582A JPS5961033A (ja) 1982-09-30 1982-09-30 高融点金属シリサイド層の形成方法

Publications (2)

Publication Number Publication Date
JPS5961033A true JPS5961033A (ja) 1984-04-07
JPH0377658B2 JPH0377658B2 (enrdf_load_stackoverflow) 1991-12-11

Family

ID=15888290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16953582A Granted JPS5961033A (ja) 1982-09-30 1982-09-30 高融点金属シリサイド層の形成方法

Country Status (1)

Country Link
JP (1) JPS5961033A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6486560A (en) * 1987-09-29 1989-03-31 Nippon Telegraph & Telephone Manufacture of semiconductor device
US5420074A (en) * 1990-07-05 1995-05-30 Kabushiki Kaisha Toshiba Method for burying low resistance material in a contact hole

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6486560A (en) * 1987-09-29 1989-03-31 Nippon Telegraph & Telephone Manufacture of semiconductor device
US5420074A (en) * 1990-07-05 1995-05-30 Kabushiki Kaisha Toshiba Method for burying low resistance material in a contact hole

Also Published As

Publication number Publication date
JPH0377658B2 (enrdf_load_stackoverflow) 1991-12-11

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