JPS59222947A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法Info
- Publication number
- JPS59222947A JPS59222947A JP58098351A JP9835183A JPS59222947A JP S59222947 A JPS59222947 A JP S59222947A JP 58098351 A JP58098351 A JP 58098351A JP 9835183 A JP9835183 A JP 9835183A JP S59222947 A JPS59222947 A JP S59222947A
- Authority
- JP
- Japan
- Prior art keywords
- electrode terminal
- frame
- semiconductor element
- electrode
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 claims abstract description 3
- 238000005520 cutting process Methods 0.000 claims description 2
- 238000005304 joining Methods 0.000 claims description 2
- 238000005452 bending Methods 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 10
- 239000011347 resin Substances 0.000 abstract description 7
- 229920005989 resin Polymers 0.000 abstract description 7
- 238000007689 inspection Methods 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 239000004020 conductor Substances 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000010949 copper Substances 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011990 functional testing Methods 0.000 description 1
- 238000009396 hybridization Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58098351A JPS59222947A (ja) | 1983-06-02 | 1983-06-02 | 半導体装置およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58098351A JPS59222947A (ja) | 1983-06-02 | 1983-06-02 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59222947A true JPS59222947A (ja) | 1984-12-14 |
JPH0437585B2 JPH0437585B2 (enrdf_load_stackoverflow) | 1992-06-19 |
Family
ID=14217469
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58098351A Granted JPS59222947A (ja) | 1983-06-02 | 1983-06-02 | 半導体装置およびその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59222947A (enrdf_load_stackoverflow) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62226636A (ja) * | 1986-03-28 | 1987-10-05 | Matsushita Electric Ind Co Ltd | プラスチツクチツプキヤリア |
JPH01173742A (ja) * | 1987-12-28 | 1989-07-10 | Hitachi Ltd | 半導体装置及びその製造方法 |
JPH01309362A (ja) * | 1988-06-08 | 1989-12-13 | Hitachi Ltd | マルチチツプ半導体装置 |
JPH02134859A (ja) * | 1988-11-16 | 1990-05-23 | Hitachi Ltd | マルチチップ半導体装置とその製造方法 |
JPH02192745A (ja) * | 1989-01-20 | 1990-07-30 | Omron Tateisi Electron Co | Icモジュールおよびその製造方法 |
US5587341A (en) * | 1987-06-24 | 1996-12-24 | Hitachi, Ltd. | Process for manufacturing a stacked integrated circuit package |
WO1998022980A1 (fr) * | 1996-11-21 | 1998-05-28 | Hitachi, Ltd. | Dispositif a semi-conducteur et son procede de fabrication |
EP0798780A3 (en) * | 1996-03-27 | 2000-09-13 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
US6984885B1 (en) | 2000-02-10 | 2006-01-10 | Renesas Technology Corp. | Semiconductor device having densely stacked semiconductor chips |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57122559A (en) * | 1980-12-08 | 1982-07-30 | Gao Ges Automation Org | Integrated circuit module support |
-
1983
- 1983-06-02 JP JP58098351A patent/JPS59222947A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57122559A (en) * | 1980-12-08 | 1982-07-30 | Gao Ges Automation Org | Integrated circuit module support |
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62226636A (ja) * | 1986-03-28 | 1987-10-05 | Matsushita Electric Ind Co Ltd | プラスチツクチツプキヤリア |
US6424030B2 (en) | 1987-06-24 | 2002-07-23 | Hitachi, Ltd. | Semiconductor memory module having double-sided stacked memory chip layout |
US5587341A (en) * | 1987-06-24 | 1996-12-24 | Hitachi, Ltd. | Process for manufacturing a stacked integrated circuit package |
US5708298A (en) * | 1987-06-24 | 1998-01-13 | Hitachi Ltd. | Semiconductor memory module having double-sided stacked memory chip layout |
US6693346B2 (en) | 1987-06-24 | 2004-02-17 | Hitachi, Ltd. | Semiconductor memory module having double-sided stacked memory chip layout |
US5910685A (en) * | 1987-06-24 | 1999-06-08 | Hitachi Ltd. | Semiconductor memory module having double-sided stacked memory chip layout |
US6521993B2 (en) | 1987-06-24 | 2003-02-18 | Hitachi, Ltd. | Semiconductor memory module having double-sided stacked memory chip layout |
US6262488B1 (en) | 1987-06-24 | 2001-07-17 | Hitachi Ltd. | Semiconductor memory module having double-sided memory chip layout |
JPH01173742A (ja) * | 1987-12-28 | 1989-07-10 | Hitachi Ltd | 半導体装置及びその製造方法 |
JPH01309362A (ja) * | 1988-06-08 | 1989-12-13 | Hitachi Ltd | マルチチツプ半導体装置 |
JPH02134859A (ja) * | 1988-11-16 | 1990-05-23 | Hitachi Ltd | マルチチップ半導体装置とその製造方法 |
JPH02192745A (ja) * | 1989-01-20 | 1990-07-30 | Omron Tateisi Electron Co | Icモジュールおよびその製造方法 |
US6208021B1 (en) | 1996-03-27 | 2001-03-27 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
US6403398B2 (en) | 1996-03-27 | 2002-06-11 | Oki Electric Industry Co, Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
EP0798780A3 (en) * | 1996-03-27 | 2000-09-13 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method thereof and aggregate type semiconductor device |
US6664616B2 (en) | 1996-11-21 | 2003-12-16 | Hitachi, Ltd. | Semiconductor device and manufacturing method thereof |
WO1998022980A1 (fr) * | 1996-11-21 | 1998-05-28 | Hitachi, Ltd. | Dispositif a semi-conducteur et son procede de fabrication |
US6759272B2 (en) | 1996-11-21 | 2004-07-06 | Renesas Technology Corp. | Semiconductor device and manufacturing method thereof |
KR100447313B1 (ko) * | 1996-11-21 | 2004-09-07 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조방법 |
US6984885B1 (en) | 2000-02-10 | 2006-01-10 | Renesas Technology Corp. | Semiconductor device having densely stacked semiconductor chips |
Also Published As
Publication number | Publication date |
---|---|
JPH0437585B2 (enrdf_load_stackoverflow) | 1992-06-19 |
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