JPS59207497A - メモリ不良ビット救済解析方法 - Google Patents

メモリ不良ビット救済解析方法

Info

Publication number
JPS59207497A
JPS59207497A JP58080898A JP8089883A JPS59207497A JP S59207497 A JPS59207497 A JP S59207497A JP 58080898 A JP58080898 A JP 58080898A JP 8089883 A JP8089883 A JP 8089883A JP S59207497 A JPS59207497 A JP S59207497A
Authority
JP
Japan
Prior art keywords
fail
data
memory
line
relief
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58080898A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0241119B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Ikuo Kawaguchi
川口　郁夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58080898A priority Critical patent/JPS59207497A/ja
Priority to EP84105285A priority patent/EP0125633B1/en
Priority to DE8484105285T priority patent/DE3482901D1/de
Priority to US06/609,445 priority patent/US4628509A/en
Publication of JPS59207497A publication Critical patent/JPS59207497A/ja
Publication of JPH0241119B2 publication Critical patent/JPH0241119B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/72—Masking faults in memories by using spares or by reconfiguring with optimized replacement algorithms

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Semiconductor Memories (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP58080898A 1983-05-11 1983-05-11 メモリ不良ビット救済解析方法 Granted JPS59207497A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP58080898A JPS59207497A (ja) 1983-05-11 1983-05-11 メモリ不良ビット救済解析方法
EP84105285A EP0125633B1 (en) 1983-05-11 1984-05-10 Testing apparatus for redundant memory
DE8484105285T DE3482901D1 (de) 1983-05-11 1984-05-10 Pruefgeraet fuer redundanzspeicher.
US06/609,445 US4628509A (en) 1983-05-11 1984-05-11 Testing apparatus for redundant memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58080898A JPS59207497A (ja) 1983-05-11 1983-05-11 メモリ不良ビット救済解析方法

Publications (2)

Publication Number Publication Date
JPS59207497A true JPS59207497A (ja) 1984-11-24
JPH0241119B2 JPH0241119B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-09-14

Family

ID=13731178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58080898A Granted JPS59207497A (ja) 1983-05-11 1983-05-11 メモリ不良ビット救済解析方法

Country Status (1)

Country Link
JP (1) JPS59207497A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317573A (en) * 1989-08-30 1994-05-31 International Business Machines Corporation Apparatus and method for real time data error capture and compression redundancy analysis
US6515921B2 (en) 1999-12-24 2003-02-04 Nec Corporation Semiconductor storage device having redundancy circuit for replacement of defect cells under tests
JP2008310883A (ja) * 2007-06-14 2008-12-25 Yokogawa Electric Corp メモリ試験装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5634198A (en) * 1979-08-27 1981-04-06 Nippon Telegr & Teleph Corp <Ntt> Releaving method of deficient bit of semiconductor memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5634198A (en) * 1979-08-27 1981-04-06 Nippon Telegr & Teleph Corp <Ntt> Releaving method of deficient bit of semiconductor memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317573A (en) * 1989-08-30 1994-05-31 International Business Machines Corporation Apparatus and method for real time data error capture and compression redundancy analysis
US6515921B2 (en) 1999-12-24 2003-02-04 Nec Corporation Semiconductor storage device having redundancy circuit for replacement of defect cells under tests
JP2008310883A (ja) * 2007-06-14 2008-12-25 Yokogawa Electric Corp メモリ試験装置

Also Published As

Publication number Publication date
JPH0241119B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-09-14

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