JPS59195856A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JPS59195856A JPS59195856A JP58070558A JP7055883A JPS59195856A JP S59195856 A JPS59195856 A JP S59195856A JP 58070558 A JP58070558 A JP 58070558A JP 7055883 A JP7055883 A JP 7055883A JP S59195856 A JPS59195856 A JP S59195856A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- wire
- wires
- container
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0612—Layout
- H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
- H01L2224/06153—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry with a staggered arrangement, e.g. depopulated array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4905—Shape
- H01L2224/49051—Connectors having different shapes
- H01L2224/49052—Different loop heights
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49431—Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4945—Wire connectors having connecting portions of different types on the semiconductor or solid-state body, e.g. regular and reverse stitches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78313—Wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85186—Translational movements connecting first outside the semiconductor or solid-state body, i.e. off-chip, reverse stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85191—Translational movements connecting first both on and outside the semiconductor or solid-state body, i.e. regular and reverse stitches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/207—Diameter ranges
- H01L2924/20751—Diameter ranges larger or equal to 10 microns less than 20 microns
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/207—Diameter ranges
- H01L2924/20752—Diameter ranges larger or equal to 20 microns less than 30 microns
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/207—Diameter ranges
- H01L2924/20753—Diameter ranges larger or equal to 30 microns less than 40 microns
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/207—Diameter ranges
- H01L2924/20754—Diameter ranges larger or equal to 40 microns less than 50 microns
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/207—Diameter ranges
- H01L2924/20755—Diameter ranges larger or equal to 50 microns less than 60 microns
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明は半導体装置とその製造方法にかかり、特にワイ
ヤボンディング方法に関する。
ヤボンディング方法に関する。
fbl 従来技術と問題点
半導体装置はxc、msxと益々高集積化されており、
それに伴って半導体チップ並びに半導体容器も大型化さ
れてきた。従って、半導体チップを半導体容器に取りつ
けた後、両者の電極を接続するボンディングワイヤ数も
非常に増加し、LSIでは200本にも及んでいる。
それに伴って半導体チップ並びに半導体容器も大型化さ
れてきた。従って、半導体チップを半導体容器に取りつ
けた後、両者の電極を接続するボンディングワイヤ数も
非常に増加し、LSIでは200本にも及んでいる。
第1図は半導体装置の組立断面図を示しており、■は半
導体チップlO上の接続パッド、2は半導体容器20上
の接続電極で、通常ワイヤ3のボンディングは先に接続
パッド1にボンディングして立ち上り、そのまま空間を
引っ張って(矢印方向)次いで外部リードに電気的に接
続されている接続電極2にボンディングして立ち下り、
ワイヤを切断する方法が採られている。稀には、接続電
極2から接続パッド1にボンディングする方法も採られ
るが、それば特別な都合に限られる。
導体チップlO上の接続パッド、2は半導体容器20上
の接続電極で、通常ワイヤ3のボンディングは先に接続
パッド1にボンディングして立ち上り、そのまま空間を
引っ張って(矢印方向)次いで外部リードに電気的に接
続されている接続電極2にボンディングして立ち下り、
ワイヤを切断する方法が採られている。稀には、接続電
極2から接続パッド1にボンディングする方法も採られ
るが、それば特別な都合に限られる。
また、ワイヤは一般に直径20〜30μmのアルミニウ
ム線又は金線が用いられており、ボンディング装置は自
動化された装置である。
ム線又は金線が用いられており、ボンディング装置は自
動化された装置である。
このようなボンディング方法において、ワイヤ数が増大
してくるとワイヤは立ち上り部から空間に浮かんで形成
されるために、空間で相互に接触しやすい状態になる。
してくるとワイヤは立ち上り部から空間に浮かんで形成
されるために、空間で相互に接触しやすい状態になる。
更に、半導体チップが大きくなって半導体容器が大型化
してくれば、配線ワイヤの長さも長くなるから上記空間
での接触の機会は益々増加し、また配線長さが長くなる
と、配線容量が増えてそれだけ半導体装置の動作特性(
高速動作)に悪影響を与える。
してくれば、配線ワイヤの長さも長くなるから上記空間
での接触の機会は益々増加し、また配線長さが長くなる
と、配線容量が増えてそれだけ半導体装置の動作特性(
高速動作)に悪影響を与える。
(C1発明の目的
本発明の目的は、半導体装置にとって非常に重要なこの
ような問題点を軽減させる製造方法を提案するものであ
る。
ような問題点を軽減させる製造方法を提案するものであ
る。
fd) 発明の構成
その目的は、半導体チップと、それを収容する容器と、
該半導体チップ上に形成された電極パッドと該容器に形
成された電極との間を接続するホンディングワイヤとを
具備し、該ホンディングワイヤはボンディング面に対し
て急峻な角度をもって接続された立ぢ上り部と、ホンデ
ング面に対して前記立ち上り部よりもゆるやかな角度を
もって接続された立ち下り部とを有し、隣合うボンディ
ングワイヤの該立ち上り部と該立ち下り部との位置が互
いに逆になるようにワイヤボンディングがなされている
半導体装置によって達成され、且つ該電極バンドが該半
導体チップ周縁に2列に設けられ、且つ該容器の電極が
少なくとも上下2段に設けられている半導体装置によっ
て達成することができる。
該半導体チップ上に形成された電極パッドと該容器に形
成された電極との間を接続するホンディングワイヤとを
具備し、該ホンディングワイヤはボンディング面に対し
て急峻な角度をもって接続された立ぢ上り部と、ホンデ
ング面に対して前記立ち上り部よりもゆるやかな角度を
もって接続された立ち下り部とを有し、隣合うボンディ
ングワイヤの該立ち上り部と該立ち下り部との位置が互
いに逆になるようにワイヤボンディングがなされている
半導体装置によって達成され、且つ該電極バンドが該半
導体チップ周縁に2列に設けられ、且つ該容器の電極が
少なくとも上下2段に設けられている半導体装置によっ
て達成することができる。
また、その製造方法の特徴は半導体チップ上の電極パ・
ノドと、それを収容する容器に形成された電極との間を
ボンディングワイヤで接続するに際し、隣合うボンディ
ングワイヤの一方は該電極パッドを始点として該容器の
電極ヘボンディングし、且つ他方は該容器の電極を始点
として該電極パソドヘボンディングし、隣合うボンディ
ングワイヤのボンディング方向が互いに逆方向になるよ
うにワイヤボンディングを行なうものである。
ノドと、それを収容する容器に形成された電極との間を
ボンディングワイヤで接続するに際し、隣合うボンディ
ングワイヤの一方は該電極パッドを始点として該容器の
電極ヘボンディングし、且つ他方は該容器の電極を始点
として該電極パソドヘボンディングし、隣合うボンディ
ングワイヤのボンディング方向が互いに逆方向になるよ
うにワイヤボンディングを行なうものである。
(e)発明の実施例
以下9図面を参照して実施例によって詳細に説明する。
第2図は本発明にかかる一実施例の組立平面図を示して
おり、半導体チップ10上の接続パッド1と半導体容器
20上の接続電極2とを接続するボンディングワイヤの
ボンディング方向は図中の矢印のように隣接する接続パ
ッド相互間および隣接する接続電極相互間をすべて反対
方向にする。図において、3aは順方向のボンディング
ワイヤ、3bは逆方向のボンディングワイヤを示してお
り、このような配線方法は自動ボンディング装置によっ
て交互に順方向と逆方向とに容易に行うことができる。
おり、半導体チップ10上の接続パッド1と半導体容器
20上の接続電極2とを接続するボンディングワイヤの
ボンディング方向は図中の矢印のように隣接する接続パ
ッド相互間および隣接する接続電極相互間をすべて反対
方向にする。図において、3aは順方向のボンディング
ワイヤ、3bは逆方向のボンディングワイヤを示してお
り、このような配線方法は自動ボンディング装置によっ
て交互に順方向と逆方向とに容易に行うことができる。
第3“図はこのようにして配線したボンディングワイヤ
の部分拡大図を示しており、第3図(a)は断面図、第
3図(blはその平面図である。ワイヤボンディングす
ると、初めにボンディングした接続パソドエまたは接続
電極2の立ち上り部でボンディングワイヤが高く立ち上
がり、それを矢印方向に引っ張ってボンデングして立ち
下がるから、空間ではワイヤ相互を一層遠い間隔にする
ことができて、同じ方向(例えば順方向のみ)に引っ張
ってボンディングするよりも接触しにくくなる。それは
本図によって容易に理解されることである。
の部分拡大図を示しており、第3図(a)は断面図、第
3図(blはその平面図である。ワイヤボンディングす
ると、初めにボンディングした接続パソドエまたは接続
電極2の立ち上り部でボンディングワイヤが高く立ち上
がり、それを矢印方向に引っ張ってボンデングして立ち
下がるから、空間ではワイヤ相互を一層遠い間隔にする
ことができて、同じ方向(例えば順方向のみ)に引っ張
ってボンディングするよりも接触しにくくなる。それは
本図によって容易に理解されることである。
次に、接続電極が高低を有する上下段に設けられた半導
体容器上の接続電極とのワイヤボンディング方法につい
て説明する。第4図は本発明によってワイヤボンディン
グした組立平面図を示しており、半導体容器21の下段
の接続電極2Cと半導体チップ11のチップ周縁に近い
接続バ・ノドICとを逆方向にワイヤボンディングし、
半導体容器21の上段の接続電極2dと半導体チップ1
1のチップ周縁より遠い接続パッド1dとを順方向にワ
イヤボンディングする。第5図はその部分拡大図を示し
、第5図(alは断面図、第5図fblは平面図である
。このようにワイヤボンディングすると、空間でワイヤ
ー相互をより遠ざけることが可能になることは、上記例
と同様である。
体容器上の接続電極とのワイヤボンディング方法につい
て説明する。第4図は本発明によってワイヤボンディン
グした組立平面図を示しており、半導体容器21の下段
の接続電極2Cと半導体チップ11のチップ周縁に近い
接続バ・ノドICとを逆方向にワイヤボンディングし、
半導体容器21の上段の接続電極2dと半導体チップ1
1のチップ周縁より遠い接続パッド1dとを順方向にワ
イヤボンディングする。第5図はその部分拡大図を示し
、第5図(alは断面図、第5図fblは平面図である
。このようにワイヤボンディングすると、空間でワイヤ
ー相互をより遠ざけることが可能になることは、上記例
と同様である。
ここに、第5図に示している半導体チップ11ば接続バ
ンドをチップ周縁に近い接続パッド1cとチップ周縁よ
り遠い接続パッド1dとの二列に形成しているが、現在
では未だこのように接続パッドは高密度には形成されて
いない。本発明によるワイヤボンディング方法を行うこ
とによって、初めて接触の心配が少なくなるから接続パ
ッドを二列にして密度を高くし、かくして半導体チップ
を小さくし、更に半導体容器を小型化することができる
。
ンドをチップ周縁に近い接続パッド1cとチップ周縁よ
り遠い接続パッド1dとの二列に形成しているが、現在
では未だこのように接続パッドは高密度には形成されて
いない。本発明によるワイヤボンディング方法を行うこ
とによって、初めて接触の心配が少なくなるから接続パ
ッドを二列にして密度を高くし、かくして半導体チップ
を小さくし、更に半導体容器を小型化することができる
。
ところで、アルミニウムワイヤを用いる場合には、ボン
ディングツールはウェッジツールと呼ばれるもので、順
方向にボンディングすると半導体容器20上の接続電極
2形成面の面積を考慮する必要がある。それは、その面
積が狭いとウェッジツールの後端が接続電極面の側壁に
当たるためで、そのために従来の順方向のボンデングで
は接続電極面を特に広くしていた。しかし、上記実施例
の下段のように逆方向にホンディングすれば、その接続
電極面は更に狭くすることができて、一層半導体容器の
小型化に役立つ。なお、金ワイヤの場合は、キャピラリ
ーツールであるから、このような心配はない。
ディングツールはウェッジツールと呼ばれるもので、順
方向にボンディングすると半導体容器20上の接続電極
2形成面の面積を考慮する必要がある。それは、その面
積が狭いとウェッジツールの後端が接続電極面の側壁に
当たるためで、そのために従来の順方向のボンデングで
は接続電極面を特に広くしていた。しかし、上記実施例
の下段のように逆方向にホンディングすれば、その接続
電極面は更に狭くすることができて、一層半導体容器の
小型化に役立つ。なお、金ワイヤの場合は、キャピラリ
ーツールであるから、このような心配はない。
また、第5図(clは第5図(alとは反対に上下段共
逆にボンデインクした断面図で、このようにボンディン
グしても空間ではワイヤの距離が従来に比べて遠くなる
から接触の問題は減少する。
逆にボンデインクした断面図で、このようにボンディン
グしても空間ではワイヤの距離が従来に比べて遠くなる
から接触の問題は減少する。
(fl 発明の効果
以上の実施例から判るように、本発明によれば空間にお
けるボンディングワイヤ相互の間隔を拡げることができ
て、接触事故を減少させ、半導体装置の信頼度を向上さ
せることが出来る。
けるボンディングワイヤ相互の間隔を拡げることができ
て、接触事故を減少させ、半導体装置の信頼度を向上さ
せることが出来る。
且つ、実装密度を高めて高集積化するメリットも大きく
、半導体装置、更には電子回路の特性向上に極めて寄与
するものである。
、半導体装置、更には電子回路の特性向上に極めて寄与
するものである。
第1図は従来の半導体装置の組立断面図、第2図は本発
明にかかる一実施例の組立平面図、第3図はその部分拡
大図で、第3図(a)は断九図、第3図(blはその平
面図、第4図は本発明にかかる他の実施例の組立平面図
、第5図はその部分拡大図、第5図(a)は断面図2第
7図(blはその平面図である。 図中、1.lc、lclは接続パッド、2.2C。 2dは接続電極、3.3a、 3bはボンディングワ
イヤ、10.11は半導体チップ、20.21は半導体
容器を示している。 第1図 第2図 第3図 第4図 第5図 (Q) (b)
明にかかる一実施例の組立平面図、第3図はその部分拡
大図で、第3図(a)は断九図、第3図(blはその平
面図、第4図は本発明にかかる他の実施例の組立平面図
、第5図はその部分拡大図、第5図(a)は断面図2第
7図(blはその平面図である。 図中、1.lc、lclは接続パッド、2.2C。 2dは接続電極、3.3a、 3bはボンディングワ
イヤ、10.11は半導体チップ、20.21は半導体
容器を示している。 第1図 第2図 第3図 第4図 第5図 (Q) (b)
Claims (3)
- (1) 半導体チップと、それを収容する容器と、該
半導体チップ上に形成された電極バンドと該容器に形成
された電極との間を接続するボンディングワイヤとを具
備し、該ボンディングワイヤはボンディング面に対して
急峻な角度をもって接続された立ち上り部と、ボンデン
グ面に対して前記立ち上り部よりもゆるやかな角度をも
って接続された立ち下り部とを有し、隣合うボンディン
グワイヤの該立ち上り部と該立ち下り部との位置が互い
に逆になるようにワイヤボンディングがなされているこ
とを特徴とする半導体装置。 - (2) k極バッドが該半導体チップ周縁に2列に設
けられ、且つ該容器の電極が少な(とも上下2段に設け
られていることを特徴とする特許請求の範囲第1項記載
の半導体装置。 - (3)半導体チップ上の電極パッドと、それを収容する
容器に形成された電極との間をポンディングワイヤで接
続するに際し、隣合うボンディングワイヤの一方は該電
極バンドを始点として該容器の電極ベボンディングし、
且つ他方は該容器の電極を始点として該電極パッドヘボ
ンディングし・隣合うポンディングワイヤのボンディン
グ方向が互いに逆方向になるようにワイヤボンディング
を行なうことを特徴とする半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58070558A JPS59195856A (ja) | 1983-04-20 | 1983-04-20 | 半導体装置及びその製造方法 |
US06/601,360 US4618879A (en) | 1983-04-20 | 1984-04-18 | Semiconductor device having adjacent bonding wires extending at different angles |
EP84400788A EP0126664B1 (en) | 1983-04-20 | 1984-04-19 | Wire bonding method for producing a semiconductor device and semiconductor device produced by this method |
DE8484400788T DE3479271D1 (en) | 1983-04-20 | 1984-04-19 | Wire bonding method for producing a semiconductor device and semiconductor device produced by this method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58070558A JPS59195856A (ja) | 1983-04-20 | 1983-04-20 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59195856A true JPS59195856A (ja) | 1984-11-07 |
JPH0239866B2 JPH0239866B2 (ja) | 1990-09-07 |
Family
ID=13434975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58070558A Granted JPS59195856A (ja) | 1983-04-20 | 1983-04-20 | 半導体装置及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4618879A (ja) |
EP (1) | EP0126664B1 (ja) |
JP (1) | JPS59195856A (ja) |
DE (1) | DE3479271D1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6185833A (ja) * | 1984-10-03 | 1986-05-01 | Toshiba Corp | ワイヤボンデイング方法 |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4705204A (en) * | 1985-03-01 | 1987-11-10 | Mitsubishi Denki Kabushiki Kaisha | Method of ball forming for wire bonding |
US5476211A (en) | 1993-11-16 | 1995-12-19 | Form Factor, Inc. | Method of manufacturing electrical contacts, using a sacrificial member |
US5917707A (en) * | 1993-11-16 | 1999-06-29 | Formfactor, Inc. | Flexible contact structure with an electrically conductive shell |
DE3621917A1 (de) * | 1986-06-30 | 1988-01-07 | Bosch Gmbh Robert | Verfahren zur herstellung elektrischer verbindungen innerhalb von halbleiterbauelementen und elektrische verbindung fuer halbleiterbauelemente |
GB2231166B (en) * | 1989-04-13 | 1993-05-05 | Ind Tech Res Inst | Organic photoreceptor for use in electrophotography |
JPH06104374A (ja) * | 1991-01-04 | 1994-04-15 | Internatl Business Mach Corp <Ibm> | 電子回路パッケージ並びにその導体の成形加工装置及び成形加工方法 |
US5155578A (en) * | 1991-04-26 | 1992-10-13 | Texas Instruments Incorporated | Bond wire configuration and injection mold for minimum wire sweep in plastic IC packages |
US5596171A (en) * | 1993-05-21 | 1997-01-21 | Harris; James M. | Package for a high frequency semiconductor device and methods for fabricating and connecting the same to an external circuit |
US5665649A (en) * | 1993-05-21 | 1997-09-09 | Gardiner Communications Corporation | Process for forming a semiconductor device base array and mounting semiconductor devices thereon |
EP0632493A1 (en) * | 1993-06-30 | 1995-01-04 | STMicroelectronics S.r.l. | Semiconductor device with twice-bonded wire and method for manufacturing |
US7084656B1 (en) | 1993-11-16 | 2006-08-01 | Formfactor, Inc. | Probe for semiconductor devices |
US7200930B2 (en) | 1994-11-15 | 2007-04-10 | Formfactor, Inc. | Probe for semiconductor devices |
US5468999A (en) * | 1994-05-26 | 1995-11-21 | Motorola, Inc. | Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding |
US5814892A (en) * | 1996-06-07 | 1998-09-29 | Lsi Logic Corporation | Semiconductor die with staggered bond pads |
JPH1050750A (ja) * | 1996-07-30 | 1998-02-20 | Nec Kyushu Ltd | 半導体装置およびその製造方法 |
US6090237A (en) * | 1996-12-03 | 2000-07-18 | Reynolds; Carl V. | Apparatus for restraining adhesive overflow in a multilayer substrate assembly during lamination |
JPH10308582A (ja) * | 1997-05-07 | 1998-11-17 | Denso Corp | 多層配線基板 |
US7525813B2 (en) * | 1998-07-06 | 2009-04-28 | Renesas Technology Corp. | Semiconductor device |
TW473882B (en) | 1998-07-06 | 2002-01-21 | Hitachi Ltd | Semiconductor device |
TWI242275B (en) * | 2003-05-16 | 2005-10-21 | Via Tech Inc | Multi-column wire bonding structure and layout method for high-frequency IC |
CN1332445C (zh) * | 2003-10-09 | 2007-08-15 | 威盛电子股份有限公司 | 一种高频集成电路多排线打线结构 |
JP4206984B2 (ja) * | 2004-07-29 | 2009-01-14 | 株式会社デンソー | 角速度検出装置 |
DE102009029040A1 (de) * | 2009-08-31 | 2011-03-03 | Robert Bosch Gmbh | Vorrichtung und Verfahren zur Herstellung einer Vorrichtung |
JP6227223B2 (ja) * | 2012-03-30 | 2017-11-08 | 富士通テン株式会社 | 半導体装置、及び半導体装置の製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5423568U (ja) * | 1977-07-19 | 1979-02-16 | ||
JPS5452466A (en) * | 1977-10-03 | 1979-04-25 | Nec Corp | Manufacture of semiconductor device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3235945A (en) * | 1962-10-09 | 1966-02-22 | Philco Corp | Connection of semiconductor elements to thin film circuits using foil ribbon |
US3515952A (en) * | 1965-02-17 | 1970-06-02 | Motorola Inc | Mounting structure for high power transistors |
JPS5423568B2 (ja) * | 1971-11-22 | 1979-08-15 | ||
JPS5561041A (en) * | 1978-10-30 | 1980-05-08 | Mitsubishi Electric Corp | Packaging device for semiconductor integrated circuit |
JPS5561051A (en) * | 1978-10-31 | 1980-05-08 | Toshiba Corp | Method and device for correcting lead wire of electronic parts |
JPS55115351A (en) * | 1979-02-26 | 1980-09-05 | Fujitsu Ltd | Ic stem |
JPS58137221A (ja) * | 1982-02-10 | 1983-08-15 | Hitachi Ltd | ワイヤボンデイング装置 |
JPS5890748A (ja) * | 1982-05-07 | 1983-05-30 | Nec Corp | 半導体装置 |
US4513355A (en) * | 1983-06-15 | 1985-04-23 | Motorola, Inc. | Metallization and bonding means and method for VLSI packages |
-
1983
- 1983-04-20 JP JP58070558A patent/JPS59195856A/ja active Granted
-
1984
- 1984-04-18 US US06/601,360 patent/US4618879A/en not_active Expired - Lifetime
- 1984-04-19 EP EP84400788A patent/EP0126664B1/en not_active Expired
- 1984-04-19 DE DE8484400788T patent/DE3479271D1/de not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5423568U (ja) * | 1977-07-19 | 1979-02-16 | ||
JPS5452466A (en) * | 1977-10-03 | 1979-04-25 | Nec Corp | Manufacture of semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6185833A (ja) * | 1984-10-03 | 1986-05-01 | Toshiba Corp | ワイヤボンデイング方法 |
JPH0564460B2 (ja) * | 1984-10-03 | 1993-09-14 | Tokyo Shibaura Electric Co |
Also Published As
Publication number | Publication date |
---|---|
EP0126664A3 (en) | 1986-01-22 |
US4618879A (en) | 1986-10-21 |
JPH0239866B2 (ja) | 1990-09-07 |
DE3479271D1 (en) | 1989-09-07 |
EP0126664A2 (en) | 1984-11-28 |
EP0126664B1 (en) | 1989-08-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS59195856A (ja) | 半導体装置及びその製造方法 | |
KR100583491B1 (ko) | 반도체패키지 및 그 제조방법 | |
US6476506B1 (en) | Packaged semiconductor with multiple rows of bond pads and method therefor | |
US5842628A (en) | Wire bonding method, semiconductor device, capillary for wire bonding and ball bump forming method | |
US7067413B2 (en) | Wire bonding method, semiconductor chip, and semiconductor package | |
US7179685B2 (en) | Fabrication method for stacked multi-chip package | |
KR20040011348A (ko) | 반도체장치 | |
US6975039B2 (en) | Method of forming a ball grid array package | |
US8361857B2 (en) | Semiconductor device having a simplified stack and method for manufacturing thereof | |
JP2008277751A (ja) | 半導体装置の製造方法、および半導体装置 | |
US7126229B2 (en) | Wire-bonding method and semiconductor package using the same | |
US20070182026A1 (en) | Semiconductor device | |
US7834463B2 (en) | Stack package having pattern die redistribution | |
JP2010087403A (ja) | 半導体装置 | |
KR100772103B1 (ko) | 적층형 패키지 및 그 제조 방법 | |
JPH10270623A (ja) | ボールグリッドアレイ用リードフレームおよびこれを用いた半導体装置、並びにその製造方法 | |
JP3702152B2 (ja) | 半導体装置 | |
US8618664B2 (en) | Semiconductor package and method for packaging the same | |
JP2970755B2 (ja) | 半導体装置 | |
JPH02211643A (ja) | 半導体装置 | |
JP3859666B2 (ja) | 半導体装置 | |
JP3887387B2 (ja) | 半導体装置 | |
JPS6242552A (ja) | 半導体装置 | |
JP4275109B2 (ja) | 半導体装置 | |
JPH05152366A (ja) | 半導体装置およびその製造方法 |