JPS59172059A - 電子計算機システム - Google Patents

電子計算機システム

Info

Publication number
JPS59172059A
JPS59172059A JP4748183A JP4748183A JPS59172059A JP S59172059 A JPS59172059 A JP S59172059A JP 4748183 A JP4748183 A JP 4748183A JP 4748183 A JP4748183 A JP 4748183A JP S59172059 A JPS59172059 A JP S59172059A
Authority
JP
Japan
Prior art keywords
processor
mode
program
slave processor
slave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4748183A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0587856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Shinji Nishibe
西部　晋二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4748183A priority Critical patent/JPS59172059A/ja
Publication of JPS59172059A publication Critical patent/JPS59172059A/ja
Publication of JPH0587856B2 publication Critical patent/JPH0587856B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP4748183A 1983-03-22 1983-03-22 電子計算機システム Granted JPS59172059A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4748183A JPS59172059A (ja) 1983-03-22 1983-03-22 電子計算機システム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4748183A JPS59172059A (ja) 1983-03-22 1983-03-22 電子計算機システム

Publications (2)

Publication Number Publication Date
JPS59172059A true JPS59172059A (ja) 1984-09-28
JPH0587856B2 JPH0587856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-12-20

Family

ID=12776317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4748183A Granted JPS59172059A (ja) 1983-03-22 1983-03-22 電子計算機システム

Country Status (1)

Country Link
JP (1) JPS59172059A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6381558A (ja) * 1986-09-25 1988-04-12 Toshiba Corp マルチｃｐｕ制御方式
EP1832977A3 (en) * 2006-03-09 2007-10-10 Telefonaktiebolaget LM Ericsson (publ) Platform boot with bridge support
US20080181501A1 (en) * 2004-07-30 2008-07-31 Hewlett-Packard Development Company, L.P. Methods, Apparatus and Software for Validating Entries Made on a Form

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55164962A (en) * 1979-06-08 1980-12-23 Mitsubishi Electric Corp Operation managing unit in multiplex computer system
JPS5717058A (en) * 1980-07-05 1982-01-28 Nec Corp Control system of microprogram
JPS5719830A (en) * 1980-07-11 1982-02-02 Hitachi Ltd Multiple connection system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55164962A (en) * 1979-06-08 1980-12-23 Mitsubishi Electric Corp Operation managing unit in multiplex computer system
JPS5717058A (en) * 1980-07-05 1982-01-28 Nec Corp Control system of microprogram
JPS5719830A (en) * 1980-07-11 1982-02-02 Hitachi Ltd Multiple connection system

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6381558A (ja) * 1986-09-25 1988-04-12 Toshiba Corp マルチｃｐｕ制御方式
US20080181501A1 (en) * 2004-07-30 2008-07-31 Hewlett-Packard Development Company, L.P. Methods, Apparatus and Software for Validating Entries Made on a Form
EP1832977A3 (en) * 2006-03-09 2007-10-10 Telefonaktiebolaget LM Ericsson (publ) Platform boot with bridge support
WO2007101533A3 (en) * 2006-03-09 2007-11-01 Ericsson Telefon Ab L M Platform boot with bridge support
JP2009529721A (ja) * 2006-03-09 2009-08-20 テレフオンアクチーボラゲット エル エム エリクソン（パブル） ブリッジサポートを有するプラットフォーム起動
US8135945B2 (en) 2006-03-09 2012-03-13 Telefonaktiebolaget L M Ericsson (Publ) Flexible boot methods for multi-processor devices

Also Published As

Publication number Publication date
JPH0587856B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-12-20

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