JPS55164962A - Operation managing unit in multiplex computer system - Google Patents

Operation managing unit in multiplex computer system

Info

Publication number
JPS55164962A
JPS55164962A JP7192579A JP7192579A JPS55164962A JP S55164962 A JPS55164962 A JP S55164962A JP 7192579 A JP7192579 A JP 7192579A JP 7192579 A JP7192579 A JP 7192579A JP S55164962 A JPS55164962 A JP S55164962A
Authority
JP
Japan
Prior art keywords
computers
computer system
managing unit
judgement circuit
specifications
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7192579A
Other languages
Japanese (ja)
Other versions
JPS605029B2 (en
Inventor
Toshinori Hosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP54071925A priority Critical patent/JPS605029B2/en
Publication of JPS55164962A publication Critical patent/JPS55164962A/en
Publication of JPS605029B2 publication Critical patent/JPS605029B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE: To perform the operation management with high reliability with a simple comstitution, by providing the logic judging circuit for program control to determine the role of each computer and the memories to store the operating state, so that flexible treatment can be made to the specifications every system.
CONSTITUTION: A plurality of computers 1a, 1b are connected to the micro μ processor operated as the logic judgement circuit 8 provided at the operation managing unit 2 via the Io ports 7a, 7b as the respective interfaces. Further, the judgement circuit 8 determines the operation mode based on the instruction from the computers 1a, 1b or the manual instruction from the operator panel 4. The newest operation state determined at this judgement circuit 8 is stored in the registers 9a, 9b consisting of the semiconductor memory so that it can cope with the alteration of the specifications such as start, stop and change in the operation mode for the computers 1a, 1b of multiplex computer system, allowing to make easy the standardization and to execute the operation management with high reliability.
COPYRIGHT: (C)1980,JPO&Japio
JP54071925A 1979-06-08 1979-06-08 Operation management device for multiple computer systems Expired JPS605029B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54071925A JPS605029B2 (en) 1979-06-08 1979-06-08 Operation management device for multiple computer systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54071925A JPS605029B2 (en) 1979-06-08 1979-06-08 Operation management device for multiple computer systems

Publications (2)

Publication Number Publication Date
JPS55164962A true JPS55164962A (en) 1980-12-23
JPS605029B2 JPS605029B2 (en) 1985-02-07

Family

ID=13474586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54071925A Expired JPS605029B2 (en) 1979-06-08 1979-06-08 Operation management device for multiple computer systems

Country Status (1)

Country Link
JP (1) JPS605029B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59128659A (en) * 1983-01-12 1984-07-24 Hitachi Ltd Composite computer system
JPS59148968A (en) * 1983-02-14 1984-08-25 Hitachi Ltd Automatic operation device
JPS59172059A (en) * 1983-03-22 1984-09-28 Toshiba Corp Electronic computer system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59128659A (en) * 1983-01-12 1984-07-24 Hitachi Ltd Composite computer system
JPS59148968A (en) * 1983-02-14 1984-08-25 Hitachi Ltd Automatic operation device
JPS59172059A (en) * 1983-03-22 1984-09-28 Toshiba Corp Electronic computer system
JPH0587856B2 (en) * 1983-03-22 1993-12-20 Tokyo Shibaura Electric Co

Also Published As

Publication number Publication date
JPS605029B2 (en) 1985-02-07

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