JPH0587856B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electronic computer system having two types of processors with different computer architectures.

[Technical background of the invention and its problems]

In recent years, the development of microelectronic computers has been remarkable.
In particular, the market for personal computers is rapidly expanding. Normally, these personal computers often use world standard microprocessors such as Intel's 8085 and 8086, Motorola's MC68000, and the like. Software assets for personal computers are becoming increasingly vast and are readily available as distributed software. On the other hand, these mainstream microprocessors are also coming into use in the field of office computers, which are ranked higher than personal computers. However, office computers have a long history and have a huge amount of software assets.
The architecture of these office computers is generally different from the mainstream microprocessors mentioned above. Therefore, in reality, it is difficult to use these microprocessors as the main processor of an office computer, for example. That is, traditional office computers and personal computer software are often incompatible. In systems such as this, where traditional computer architecture cannot be easily changed,
There was a drawback in that it was not possible to use distributed software for personal computers, which has become increasingly popular in recent years.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and its purpose is to
The object of the present invention is to provide an electronic computer system that can apply software of any architecture in a system having various types of processors.

[Summary of the invention]

The present invention provides a system comprising a master processor having a first architecture, a main memory, a slave processor having a second architecture different from the first architecture, and a local memory. A first mode in which a processor executes a system program stored in main memory and a slave processor executes an input/output control program stored in local memory, or a system in which a slave processor executes an input/output control program stored in local memory. If either one of the program and the second mode for executing the input/output control program can be selected by the selection means, and the second mode is selected by the selection means at the time of system startup, By configuring the system program and input/output control program to be loaded into the local memory, distribution software of the second architecture can be used by the slave processor in the second mode. .

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of an electronic computer system, for example an office computer system. In the figure, 11 is the first architecture (architecture of a conventional office computer)
12 is the master processor 1.
This is the main memory in which programs, data, etc. used by 1 are stored. 13 is a bus interface provided between the master processor 11 and main memory 12, and a system bus 26 to be described later; 14 is a slave processor of a second architecture (an architecture different from the master processor 11); It is. The slave processor 14 is, for example, a microprocessor. SW is a mode switch. The mode switch SW selects a first mode in which the master processor 11 is used as the main processor and the slave processor 14 is used as the input/output processor, or a first mode in which the slave processor 14 is used as both the main processor and the input/output processor (i.e., the first mode is used as the main processor and the input/output processor). It is used to specify either one of the second modes used as a single processor in a computer or the like. On/off information indicating the state of the mode switch SW is held in the bus interface 13.

A local memory 15 stores programs, data, etc. used by the slave processor 14. 16 is a CRT monitor, and 17 is a CRT controller (hereinafter referred to as CRTC). 18 is a keyboard (hereinafter referred to as KB), and 19 is a keyboard controller (hereinafter referred to as KBC). 20 is a floppy disk drive (hereinafter referred to as FDD), and 21 is a floppy disk controller (hereinafter referred to as FDC).
22 is a magnetic disk device (hereinafter referred to as DISK); 23 is a disk controller (hereinafter referred to as DISK);
(referred to as DISKC). 24 is a printer (hereinafter referred to as PRT), and 25 is a printer controller (hereinafter referred to as PRTC). 26 is bus interface 13, slave processor 14, local memory, 15, CRTC17, KBC19, FDC
This is a system bus that connects 21, DIGKC23, PRTC25, etc.

Next, the operation of one embodiment of the present invention will be explained with reference to the flowchart shown in FIG. When the system is powered on, an initial program loading routine (this is called an IPL routine) in a microprogram fixedly stored in a ROM (not shown) possessed by the slave processor 14 is activated. is started (step S1).Then, the slave processor 14 executes the IPL routine,
First, it is determined whether the first mode is specified by the mode switch SW (step
S2). This is done by the slave processor 14 reading the on/off information of the mode switch SW held in the bus interface 13. When the slave processor 14 determines that the first mode is designated by the mode switch SW, it loads the input/output control program for the first mode stored in the DISK 22 into the local memory 15 (step 1).
S3). Then, control is transferred to the input/output control program, and the slave processor 14, for example, processes the DISK 22 based on a predetermined routine of the program.
Load the system program for the first mode stored in the main memory 12 (step
S4). As a result, control is transferred to the relevant step program, and the system is recorded (step
S5). The master processor 11 executes the system program and activates the slave processor 14 when input/output processing is required. As a result, parallel operations of system program processing by the master processor 11 and input/output processing (based on the input/output control program) by the slave processor 14 are started. When the slave processor 14 completes the input/output processing, it interrupts the master processor 11.

On the other hand, if it is determined in step S2 that the first mode is not designated, that is, if it is determined that the second mode is designated, the slave processor 14 first performs the IPL routine according to the IPL routine described above. The master processor 11 is disconnected from the system (step S6). This can be done by turning off the power to the master processor 11, or by controlling the bus interface 13 to
1 from the system bus 26. Next, the slave processor 14
For example, the system program for the second mode and the input/output control program stored in the FDD 20, that is, a program compatible with the architecture of the slave processor 14, are stored in the local memory 1.
5 (step S7). Control is then transferred to the system program in the local memory 15, and the system is started (step S8). As a result, all system operations are performed solely by the slave processor 14, similar to a personal computer or the like that is operated by a single processor.
That is, the slave processor 14 alone performs program processing based on the system program and input/output processing based on the input/output control program in a time-sharing manner.

In the above embodiment, the slave processor 14 disconnects the master processor 11 from the system when the second mode is specified, but the bus interface 13 disconnects the master processor 11 from the system depending on the on/off state of the mode switch SW. 11 from the system (in this case, from the system bus 26).

〔Effect of the invention〕

As detailed above, according to the present invention, when a processor of a general (standard) computer architecture is used as a processor required to function as an input/output processor in a conventional computer system, the processor Since the processor can also function as the main processor, commercially available distribution software can be run on the processor. Moreover, since the present invention is not emulated by a master processor, it is possible to obtain performance equivalent to that of the original target machine. Further, according to the present invention, the software of the architecture of the master processor can be applied in the same way as in the past.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a flowchart for explaining the operation. 11... Master processor, 12... Main memory, 14... Slave processor, 15... Local memory, SW... Mode switch.

Claims (1)

[Scope of Claims] 1. A master processor having a first architecture, a main memory storing a program executed by the master processor, and a second architecture different from the first architecture. In an electronic computer system comprising a slave processor having a master processor and a local memory storing a program to be executed by the slave processor, the master processor executes a system program stored in the main memory and the slave processor A first mode in which the processor executes an input/output control program stored in the local memory, or a second mode in which the slave processor executes a system program and an input/output control program stored in the local memory. a selection means for selecting either one; and when the computer system is started up, based on the selection result of the selection means, in the case of the second mode, the system program and the input/output control program are stored in the local memory; An electronic computer system comprising: reading means for loading data.