JPS5719830A - Multiple connection system - Google Patents

Multiple connection system

Info

Publication number
JPS5719830A
JPS5719830A JP9392880A JP9392880A JPS5719830A JP S5719830 A JPS5719830 A JP S5719830A JP 9392880 A JP9392880 A JP 9392880A JP 9392880 A JP9392880 A JP 9392880A JP S5719830 A JPS5719830 A JP S5719830A
Authority
JP
Japan
Prior art keywords
signal
line
processing equipment
multiple connecting
connecting line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9392880A
Other languages
Japanese (ja)
Inventor
Kiyoji Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9392880A priority Critical patent/JPS5719830A/en
Publication of JPS5719830A publication Critical patent/JPS5719830A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To connect different processing equipments, by giving a use permission signal and a connection instructing signal from a selection device to a processing equipment and a connection device, respectively, in a system for connecting plural processing equipments to a common multiple connecting line group. CONSTITUTION:A multiple connecting line use request signal is outputted to a signal line 10 from a processing equipment 1, and when it is confirmed that a multiple connecting line group 4 is not used by a processing equipment 2, a selection device 3 supplies a use permission signal to the processing equipment 1 through a signal line 11, and simultaneously outputs a ''1'' signal to a signal line 12. As a result, a gate to each address selection line and each data line in a connection device 5 is opened, and an address selection line and a data line of the processing equipment 1 are connected to corresponding lines of the multiple connecting line group 4. Accordingly, a processing equipment whose address length and data length are different can be connected to a common multiple connecting line group.
JP9392880A 1980-07-11 1980-07-11 Multiple connection system Pending JPS5719830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9392880A JPS5719830A (en) 1980-07-11 1980-07-11 Multiple connection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9392880A JPS5719830A (en) 1980-07-11 1980-07-11 Multiple connection system

Publications (1)

Publication Number Publication Date
JPS5719830A true JPS5719830A (en) 1982-02-02

Family

ID=14096088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9392880A Pending JPS5719830A (en) 1980-07-11 1980-07-11 Multiple connection system

Country Status (1)

Country Link
JP (1) JPS5719830A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59172059A (en) * 1983-03-22 1984-09-28 Toshiba Corp Electronic computer system
JPS60254358A (en) * 1984-05-31 1985-12-16 Toshiba Corp Multi-architecture microprocessor system
JPS6331473U (en) * 1986-08-19 1988-03-01

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59172059A (en) * 1983-03-22 1984-09-28 Toshiba Corp Electronic computer system
JPH0587856B2 (en) * 1983-03-22 1993-12-20 Tokyo Shibaura Electric Co
JPS60254358A (en) * 1984-05-31 1985-12-16 Toshiba Corp Multi-architecture microprocessor system
JPS6331473U (en) * 1986-08-19 1988-03-01

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