JPS575140A - Data processing system equipped with standard bus - Google Patents

Data processing system equipped with standard bus

Info

Publication number
JPS575140A
JPS575140A JP7817880A JP7817880A JPS575140A JP S575140 A JPS575140 A JP S575140A JP 7817880 A JP7817880 A JP 7817880A JP 7817880 A JP7817880 A JP 7817880A JP S575140 A JPS575140 A JP S575140A
Authority
JP
Japan
Prior art keywords
bus
data processing
processing system
system equipped
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7817880A
Other languages
Japanese (ja)
Inventor
Juichi Maesumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7817880A priority Critical patent/JPS575140A/en
Publication of JPS575140A publication Critical patent/JPS575140A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To extend a bus line securely with extremely ease, by controlling efficiently the switching of directions of the bus line of a standard bus to which various equipments are connectable. CONSTITUTION:When a standard interface bus 20A is connected to an extended interface bus 20B via an adapter 21, the adapter 21 has control at either side of the interface buses 20A and 20B, and a function of control over the state of a talker, and bus-direction switching and connection are carried out suitably. Therefore, equipments 241-24n connectable to the interface bus 20B are installed at distances.
JP7817880A 1980-06-10 1980-06-10 Data processing system equipped with standard bus Pending JPS575140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7817880A JPS575140A (en) 1980-06-10 1980-06-10 Data processing system equipped with standard bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7817880A JPS575140A (en) 1980-06-10 1980-06-10 Data processing system equipped with standard bus

Publications (1)

Publication Number Publication Date
JPS575140A true JPS575140A (en) 1982-01-11

Family

ID=13654703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7817880A Pending JPS575140A (en) 1980-06-10 1980-06-10 Data processing system equipped with standard bus

Country Status (1)

Country Link
JP (1) JPS575140A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0285949A (en) * 1988-09-22 1990-03-27 Nec Corp General-purpose interface bus controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0285949A (en) * 1988-09-22 1990-03-27 Nec Corp General-purpose interface bus controller

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