JPS6471237A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS6471237A
JPS6471237A JP22782787A JP22782787A JPS6471237A JP S6471237 A JPS6471237 A JP S6471237A JP 22782787 A JP22782787 A JP 22782787A JP 22782787 A JP22782787 A JP 22782787A JP S6471237 A JPS6471237 A JP S6471237A
Authority
JP
Japan
Prior art keywords
peripheral equipment
processing
signal
field
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22782787A
Other languages
Japanese (ja)
Inventor
Takao Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22782787A priority Critical patent/JPS6471237A/en
Publication of JPS6471237A publication Critical patent/JPS6471237A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To control plural peripheral equipments in parallel without mutual effect by constituting a bus by an incoming signal line and an outgoing line and applying individual field for each peripheral equipment for the transmission/ reception of a signal between the peripheral equipments. CONSTITUTION:When a control signal 1 and a control data are sent to an incoming signal line 5 in the field of a peripheral equipment from a central controller 1, the peripheral equipment 2 uses a bus adaptor section 21 so as to confirm it that the control signal of its own field is logical '1' to fetch the control data and a processing section 22 applies the processing. When the processing is finished, the processing section 22 returns the control signal 1 and the reply signal to the field of the outgoing signal line 6 of the peripheral equipment 2. Moreover, when the control signal 1 and the control data are sent to the field of the peripheral equipment 3 of the incoming signal line 5 from the central controller 1 during the processing of the peripheral equipment 2, the peripheral equipment fetches the control data and the processing section 32 applies processing to return the reply signal.
JP22782787A 1987-09-11 1987-09-11 Information processing system Pending JPS6471237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22782787A JPS6471237A (en) 1987-09-11 1987-09-11 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22782787A JPS6471237A (en) 1987-09-11 1987-09-11 Information processing system

Publications (1)

Publication Number Publication Date
JPS6471237A true JPS6471237A (en) 1989-03-16

Family

ID=16866991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22782787A Pending JPS6471237A (en) 1987-09-11 1987-09-11 Information processing system

Country Status (1)

Country Link
JP (1) JPS6471237A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5881065A (en) * 1995-10-04 1999-03-09 Ultra-High Speed Network And Computer Technology Laboratories Data transfer switch for transferring data of an arbitrary length on the basis of transfer destination

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5881065A (en) * 1995-10-04 1999-03-09 Ultra-High Speed Network And Computer Technology Laboratories Data transfer switch for transferring data of an arbitrary length on the basis of transfer destination

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