JPS59162690A - 擬似スタテイツクメモリ - Google Patents

擬似スタテイツクメモリ

Info

Publication number
JPS59162690A
JPS59162690A JP58035331A JP3533183A JPS59162690A JP S59162690 A JPS59162690 A JP S59162690A JP 58035331 A JP58035331 A JP 58035331A JP 3533183 A JP3533183 A JP 3533183A JP S59162690 A JPS59162690 A JP S59162690A
Authority
JP
Japan
Prior art keywords
atrf
substrate voltage
oscillator
voltage generating
generating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58035331A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0311033B2 (enrdf_load_stackoverflow
Inventor
Kazuo Nakaizumi
中泉　一雄
Yasaburo Inagaki
稲垣　弥三郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=12438843&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPS59162690(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58035331A priority Critical patent/JPS59162690A/ja
Priority to DE8484102179T priority patent/DE3484518D1/de
Priority to EP84102179A priority patent/EP0118108B1/en
Priority to US06/585,656 priority patent/US4616346A/en
Publication of JPS59162690A publication Critical patent/JPS59162690A/ja
Publication of JPH0311033B2 publication Critical patent/JPH0311033B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP58035331A 1983-03-04 1983-03-04 擬似スタテイツクメモリ Granted JPS59162690A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP58035331A JPS59162690A (ja) 1983-03-04 1983-03-04 擬似スタテイツクメモリ
DE8484102179T DE3484518D1 (de) 1983-03-04 1984-03-01 Speicher mit wahlfreiem zugriff mit aktiv- und bereitschaftsbetrieb.
EP84102179A EP0118108B1 (en) 1983-03-04 1984-03-01 Random access memory having active and standby modes
US06/585,656 US4616346A (en) 1983-03-04 1984-03-02 Random access memory capable of varying a frequency in active and standby modes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58035331A JPS59162690A (ja) 1983-03-04 1983-03-04 擬似スタテイツクメモリ

Publications (2)

Publication Number Publication Date
JPS59162690A true JPS59162690A (ja) 1984-09-13
JPH0311033B2 JPH0311033B2 (enrdf_load_stackoverflow) 1991-02-15

Family

ID=12438843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58035331A Granted JPS59162690A (ja) 1983-03-04 1983-03-04 擬似スタテイツクメモリ

Country Status (4)

Country Link
US (1) US4616346A (enrdf_load_stackoverflow)
EP (1) EP0118108B1 (enrdf_load_stackoverflow)
JP (1) JPS59162690A (enrdf_load_stackoverflow)
DE (1) DE3484518D1 (enrdf_load_stackoverflow)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061992A (ja) * 1983-09-14 1985-04-09 Nec Corp 擬似スタティックメモリ
JPS63138594A (ja) * 1986-11-28 1988-06-10 Nec Corp ダイナミツクメモリ
JPH01149295A (ja) * 1987-12-03 1989-06-12 Mitsubishi Electric Corp 半導体記憶装置
JPH01213892A (ja) * 1988-02-23 1989-08-28 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
JPH0214560A (ja) * 1988-06-30 1990-01-18 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
JPH02156498A (ja) * 1988-12-08 1990-06-15 Mitsubishi Electric Corp リフレッシュ機能内蔵ダイナミック型半導体記憶装置
JPH02312095A (ja) * 1989-05-26 1990-12-27 Mitsubishi Electric Corp 半導体記憶装置
JPH04274084A (ja) * 1991-02-27 1992-09-30 Toshiba Corp 基板電位調整装置
JPH0745072A (ja) * 1993-07-24 1995-02-14 Nec Corp 自己リフレッシュ機能内蔵半導体集積回路装置
US5694365A (en) * 1996-02-15 1997-12-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device capable of setting the magnitude of substrate voltage in accordance with the mode
US6700434B2 (en) 2000-08-14 2004-03-02 Mitsubishi Denki Kabushiki Kaisha Substrate bias voltage generating circuit

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159688A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd 半導体集積回路装置
US5313428A (en) * 1987-11-12 1994-05-17 Sharp Kabushiki Kaisha Field memory self-refreshing device utilizing a refresh clock signal selected from two separate clock signals
GB8801472D0 (en) * 1988-01-22 1988-02-24 Int Computers Ltd Dynamic random-access memory
GB8813795D0 (en) * 1988-06-10 1988-07-13 Cambridge Computer Ltd Memory device
US4961167A (en) * 1988-08-26 1990-10-02 Mitsubishi Denki Kabushiki Kaisha Substrate bias generator in a dynamic random access memory with auto/self refresh functions and a method of generating a substrate bias therein
JP2614514B2 (ja) * 1989-05-19 1997-05-28 三菱電機株式会社 ダイナミック・ランダム・アクセス・メモリ
JPH03231320A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp マイクロコンピュータシステム
DE69128061T2 (de) * 1990-08-30 1998-03-26 Nippon Electric Co Halbleiterspeicheranordnung
JPH04255989A (ja) * 1991-02-07 1992-09-10 Mitsubishi Electric Corp 半導体記憶装置および内部電圧発生方法
JPH0528634A (ja) * 1991-07-18 1993-02-05 Canon Inc 磁気記録装置
US5329168A (en) * 1991-12-27 1994-07-12 Nec Corporation Semiconductor integrated circuit device equipped with substrate biasing system selectively powered from internal and external power sources
EP0836194B1 (en) * 1992-03-30 2000-05-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
JP3090833B2 (ja) * 1993-12-28 2000-09-25 株式会社東芝 半導体記憶装置
DE19618094C2 (de) * 1996-05-06 1999-06-02 Sgs Thomson Microelectronics Steuerschaltung mit nachstimmbarem Standby-Oszillator
US6134167A (en) * 1998-06-04 2000-10-17 Compaq Computer Corporation Reducing power consumption in computer memory
US6038673A (en) * 1998-11-03 2000-03-14 Intel Corporation Computer system with power management scheme for DRAM devices
US6208577B1 (en) * 1999-04-16 2001-03-27 Micron Technology, Inc. Circuit and method for refreshing data stored in a memory cell
JP2001338489A (ja) * 2000-05-24 2001-12-07 Mitsubishi Electric Corp 半導体装置
CN1502109B (zh) * 2001-04-02 2010-05-26 恩益禧电子股份有限公司 半导体存储器及其更新方法
JP3724464B2 (ja) * 2002-08-19 2005-12-07 株式会社デンソー 半導体圧力センサ
US6894917B2 (en) * 2003-01-17 2005-05-17 Etron Technology, Inc. DRAM refresh scheme with flexible frequency for active and standby mode
US20050088894A1 (en) * 2003-10-23 2005-04-28 Brucke Paul E. Auto-refresh multiple row activation
JP4549711B2 (ja) * 2004-03-29 2010-09-22 ルネサスエレクトロニクス株式会社 半導体回路装置
JP2006146992A (ja) * 2004-11-16 2006-06-08 Elpida Memory Inc 半導体メモリ装置
US9384818B2 (en) * 2005-04-21 2016-07-05 Violin Memory Memory power management

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5545158A (en) * 1978-09-27 1980-03-29 Hitachi Ltd Mis field effect semiconductor circuit device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3806741A (en) * 1972-05-17 1974-04-23 Standard Microsyst Smc Self-biasing technique for mos substrate voltage
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
JPS5559756A (en) * 1978-10-30 1980-05-06 Fujitsu Ltd Semiconductor device
US4356412A (en) * 1979-03-05 1982-10-26 Motorola, Inc. Substrate bias regulator
JPS5694654A (en) * 1979-12-27 1981-07-31 Toshiba Corp Generating circuit for substrate bias voltage
JPS58105563A (ja) * 1981-12-17 1983-06-23 Mitsubishi Electric Corp 基板バイアス発生回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5545158A (en) * 1978-09-27 1980-03-29 Hitachi Ltd Mis field effect semiconductor circuit device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061992A (ja) * 1983-09-14 1985-04-09 Nec Corp 擬似スタティックメモリ
JPS63138594A (ja) * 1986-11-28 1988-06-10 Nec Corp ダイナミツクメモリ
JPH01149295A (ja) * 1987-12-03 1989-06-12 Mitsubishi Electric Corp 半導体記憶装置
JPH01213892A (ja) * 1988-02-23 1989-08-28 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
JPH0214560A (ja) * 1988-06-30 1990-01-18 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
JPH02156498A (ja) * 1988-12-08 1990-06-15 Mitsubishi Electric Corp リフレッシュ機能内蔵ダイナミック型半導体記憶装置
JPH02312095A (ja) * 1989-05-26 1990-12-27 Mitsubishi Electric Corp 半導体記憶装置
JPH04274084A (ja) * 1991-02-27 1992-09-30 Toshiba Corp 基板電位調整装置
JPH0745072A (ja) * 1993-07-24 1995-02-14 Nec Corp 自己リフレッシュ機能内蔵半導体集積回路装置
US5694365A (en) * 1996-02-15 1997-12-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device capable of setting the magnitude of substrate voltage in accordance with the mode
US6700434B2 (en) 2000-08-14 2004-03-02 Mitsubishi Denki Kabushiki Kaisha Substrate bias voltage generating circuit

Also Published As

Publication number Publication date
EP0118108A3 (en) 1988-02-03
US4616346A (en) 1986-10-07
DE3484518D1 (de) 1991-06-06
EP0118108A2 (en) 1984-09-12
JPH0311033B2 (enrdf_load_stackoverflow) 1991-02-15
EP0118108B1 (en) 1991-05-02

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