JPS59158529A - 半導体装置の樹脂複数層封止方法 - Google Patents

半導体装置の樹脂複数層封止方法

Info

Publication number
JPS59158529A
JPS59158529A JP3182583A JP3182583A JPS59158529A JP S59158529 A JPS59158529 A JP S59158529A JP 3182583 A JP3182583 A JP 3182583A JP 3182583 A JP3182583 A JP 3182583A JP S59158529 A JPS59158529 A JP S59158529A
Authority
JP
Japan
Prior art keywords
gate
mold
frame
molding
inner molding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3182583A
Other languages
English (en)
Japanese (ja)
Other versions
JPH04385B2 (enrdf_load_stackoverflow
Inventor
Mitsugi Miyamoto
宮本　貢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3182583A priority Critical patent/JPS59158529A/ja
Publication of JPS59158529A publication Critical patent/JPS59158529A/ja
Publication of JPH04385B2 publication Critical patent/JPH04385B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP3182583A 1983-03-01 1983-03-01 半導体装置の樹脂複数層封止方法 Granted JPS59158529A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3182583A JPS59158529A (ja) 1983-03-01 1983-03-01 半導体装置の樹脂複数層封止方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3182583A JPS59158529A (ja) 1983-03-01 1983-03-01 半導体装置の樹脂複数層封止方法

Publications (2)

Publication Number Publication Date
JPS59158529A true JPS59158529A (ja) 1984-09-08
JPH04385B2 JPH04385B2 (enrdf_load_stackoverflow) 1992-01-07

Family

ID=12341852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3182583A Granted JPS59158529A (ja) 1983-03-01 1983-03-01 半導体装置の樹脂複数層封止方法

Country Status (1)

Country Link
JP (1) JPS59158529A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH04385B2 (enrdf_load_stackoverflow) 1992-01-07

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