JPS5915507Y2 - 半導体取着構造 - Google Patents
半導体取着構造Info
- Publication number
- JPS5915507Y2 JPS5915507Y2 JP14925779U JP14925779U JPS5915507Y2 JP S5915507 Y2 JPS5915507 Y2 JP S5915507Y2 JP 14925779 U JP14925779 U JP 14925779U JP 14925779 U JP14925779 U JP 14925779U JP S5915507 Y2 JPS5915507 Y2 JP S5915507Y2
- Authority
- JP
- Japan
- Prior art keywords
- metal film
- mounting structure
- semiconductor mounting
- bonding
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
【考案の詳細な説明】
本考案は合成樹脂からなるフレキシブル基板を用いた半
導体取着構造に関する。
導体取着構造に関する。
従来この種の構造として第1図に示す如く、厚み約0.
05mmのポリイミド等の合成樹脂からなるフレキシブ
ル基板1上に銅などの配線金属膜2を被着し、該金属膜
上に半導体ペレット3及びワイヤ4の各ボンディングを
施したものが知られている。
05mmのポリイミド等の合成樹脂からなるフレキシブ
ル基板1上に銅などの配線金属膜2を被着し、該金属膜
上に半導体ペレット3及びワイヤ4の各ボンディングを
施したものが知られている。
然るに上記構造では各種ボンディングのために基板1を
加熱すると該基板が軟化し、上記ポンチ゛イングが困難
となる。
加熱すると該基板が軟化し、上記ポンチ゛イングが困難
となる。
この点を解決するには配線金属膜2にニッケル等の硬質
金属をメッキすれば良いが、その場合、第1図の様に基
板1を直角に折るとその部分で硬質金属膜が切断し、配
線金属膜2をも切断してしまう。
金属をメッキすれば良いが、その場合、第1図の様に基
板1を直角に折るとその部分で硬質金属膜が切断し、配
線金属膜2をも切断してしまう。
本考案は上記の点に鑑みてなされたもので、第2図の実
施例に示す如く、ニッケル等の硬質金属膜5をペレット
3及びワイヤ4の各ボンディング部分のみに配線金属膜
2とメッキにより重畳被着したことを特徴とするもので
゛ある。
施例に示す如く、ニッケル等の硬質金属膜5をペレット
3及びワイヤ4の各ボンディング部分のみに配線金属膜
2とメッキにより重畳被着したことを特徴とするもので
゛ある。
尚、第2図において第1図と同一部分には同一番号を付
す。
す。
又第2図にて6は硬質金属膜5及び配線金属膜2上にメ
ッキ被着された金膜である。
ッキ被着された金膜である。
かくして本考案によれば、ボンディング部分には硬質金
属膜が被着されているのでボンディング時に基板の熱変
形が生じることなくその作業が容易となり、かつ上記硬
質金属はボンディング部分のみに存在しているので基板
の大部分を配線金属膜の切断を伴うことなく自由に折曲
することができる。
属膜が被着されているのでボンディング時に基板の熱変
形が生じることなくその作業が容易となり、かつ上記硬
質金属はボンディング部分のみに存在しているので基板
の大部分を配線金属膜の切断を伴うことなく自由に折曲
することができる。
第1図は従来例を示す斜視図、第2図は本考案の実施例
を示す断面図である。 1・・・・・・フレキシブル基板、2・・・・・・配線
金属膜、5・・・・・・硬質金属膜。
を示す断面図である。 1・・・・・・フレキシブル基板、2・・・・・・配線
金属膜、5・・・・・・硬質金属膜。
Claims (1)
- 合成樹脂からなるフレキシブル基板上に配線金属膜を被
着し、該金属膜上に半導体ペレットボンディング及びワ
イヤボンディングをしてなる構造において、上記ペレッ
ト及びワイヤの各ボンディング部分のみに硬質金属膜を
上記配線金属膜と重畳被着したことを特徴とする半導体
取着構造。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14925779U JPS5915507Y2 (ja) | 1979-10-26 | 1979-10-26 | 半導体取着構造 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14925779U JPS5915507Y2 (ja) | 1979-10-26 | 1979-10-26 | 半導体取着構造 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5665666U JPS5665666U (ja) | 1981-06-01 |
JPS5915507Y2 true JPS5915507Y2 (ja) | 1984-05-08 |
Family
ID=29380353
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14925779U Expired JPS5915507Y2 (ja) | 1979-10-26 | 1979-10-26 | 半導体取着構造 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5915507Y2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0785482B2 (ja) * | 1986-02-03 | 1995-09-13 | ミノルタ株式会社 | フレキシブルプリント配線基板 |
JP5700761B2 (ja) * | 2010-07-13 | 2015-04-15 | 日本電子材料株式会社 | 電気的接続装置 |
-
1979
- 1979-10-26 JP JP14925779U patent/JPS5915507Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5665666U (ja) | 1981-06-01 |
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