JPS59145561A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59145561A
JPS59145561A JP2003183A JP2003183A JPS59145561A JP S59145561 A JPS59145561 A JP S59145561A JP 2003183 A JP2003183 A JP 2003183A JP 2003183 A JP2003183 A JP 2003183A JP S59145561 A JPS59145561 A JP S59145561A
Authority
JP
Japan
Prior art keywords
polycrystalline silicon
film
layer
region
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003183A
Other languages
English (en)
Japanese (ja)
Other versions
JPS643064B2 (enrdf_load_stackoverflow
Inventor
Masakatsu Yoshida
吉田　正勝
Kouji Takebayashi
竹林　孝路
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP2003183A priority Critical patent/JPS59145561A/ja
Publication of JPS59145561A publication Critical patent/JPS59145561A/ja
Publication of JPS643064B2 publication Critical patent/JPS643064B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2003183A 1983-02-09 1983-02-09 半導体装置の製造方法 Granted JPS59145561A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003183A JPS59145561A (ja) 1983-02-09 1983-02-09 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003183A JPS59145561A (ja) 1983-02-09 1983-02-09 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59145561A true JPS59145561A (ja) 1984-08-21
JPS643064B2 JPS643064B2 (enrdf_load_stackoverflow) 1989-01-19

Family

ID=12015696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003183A Granted JPS59145561A (ja) 1983-02-09 1983-02-09 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59145561A (enrdf_load_stackoverflow)

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXPERIMENTAL AND THEORETICAL RESULT ON FINE-LINE P-CHANNEL MOSFETS=1981 *
JAPANESE JOURNAL OF APPLIED PHYSICS=1980 *

Also Published As

Publication number Publication date
JPS643064B2 (enrdf_load_stackoverflow) 1989-01-19

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