JPS5911596A - メモリのバツクアツプ方法 - Google Patents

メモリのバツクアツプ方法

Info

Publication number
JPS5911596A
JPS5911596A JP57119019A JP11901982A JPS5911596A JP S5911596 A JPS5911596 A JP S5911596A JP 57119019 A JP57119019 A JP 57119019A JP 11901982 A JP11901982 A JP 11901982A JP S5911596 A JPS5911596 A JP S5911596A
Authority
JP
Japan
Prior art keywords
data
memory
area
write
variable memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57119019A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6235706B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Tadaki
但木　洋
Yukio Seo
瀬尾　幸男
Junichi Ueno
上野　潤一
Kazuyuki Kamimura
一幸 神村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP57119019A priority Critical patent/JPS5911596A/ja
Publication of JPS5911596A publication Critical patent/JPS5911596A/ja
Publication of JPS6235706B2 publication Critical patent/JPS6235706B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
JP57119019A 1982-07-08 1982-07-08 メモリのバツクアツプ方法 Granted JPS5911596A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57119019A JPS5911596A (ja) 1982-07-08 1982-07-08 メモリのバツクアツプ方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57119019A JPS5911596A (ja) 1982-07-08 1982-07-08 メモリのバツクアツプ方法

Publications (2)

Publication Number Publication Date
JPS5911596A true JPS5911596A (ja) 1984-01-21
JPS6235706B2 JPS6235706B2 (enrdf_load_stackoverflow) 1987-08-03

Family

ID=14750968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57119019A Granted JPS5911596A (ja) 1982-07-08 1982-07-08 メモリのバツクアツプ方法

Country Status (1)

Country Link
JP (1) JPS5911596A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60232000A (ja) * 1984-05-01 1985-11-18 Meidensha Electric Mfg Co Ltd 不揮発性メモリのデ−タ処理方式
JPS6262624A (ja) * 1985-09-12 1987-03-19 Yaesu Musen Co Ltd アンテナ整合器
FR2766593A1 (fr) * 1997-07-25 1999-01-29 Aerospatiale Procede et dispositif pour proteger des donnees d'un systeme electronique contre une agression ionisante

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60232000A (ja) * 1984-05-01 1985-11-18 Meidensha Electric Mfg Co Ltd 不揮発性メモリのデ−タ処理方式
JPS6262624A (ja) * 1985-09-12 1987-03-19 Yaesu Musen Co Ltd アンテナ整合器
FR2766593A1 (fr) * 1997-07-25 1999-01-29 Aerospatiale Procede et dispositif pour proteger des donnees d'un systeme electronique contre une agression ionisante

Also Published As

Publication number Publication date
JPS6235706B2 (enrdf_load_stackoverflow) 1987-08-03

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