JPS59115653U - 絶縁物封止半導体装置 - Google Patents

絶縁物封止半導体装置

Info

Publication number
JPS59115653U
JPS59115653U JP866483U JP866483U JPS59115653U JP S59115653 U JPS59115653 U JP S59115653U JP 866483 U JP866483 U JP 866483U JP 866483 U JP866483 U JP 866483U JP S59115653 U JPS59115653 U JP S59115653U
Authority
JP
Japan
Prior art keywords
external
insulator
lead
recess
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP866483U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6322678Y2 (enrdf_load_stackoverflow
Inventor
都外川　峯秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP866483U priority Critical patent/JPS59115653U/ja
Publication of JPS59115653U publication Critical patent/JPS59115653U/ja
Application granted granted Critical
Publication of JPS6322678Y2 publication Critical patent/JPS6322678Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP866483U 1983-01-25 1983-01-25 絶縁物封止半導体装置 Granted JPS59115653U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP866483U JPS59115653U (ja) 1983-01-25 1983-01-25 絶縁物封止半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP866483U JPS59115653U (ja) 1983-01-25 1983-01-25 絶縁物封止半導体装置

Publications (2)

Publication Number Publication Date
JPS59115653U true JPS59115653U (ja) 1984-08-04
JPS6322678Y2 JPS6322678Y2 (enrdf_load_stackoverflow) 1988-06-22

Family

ID=30140147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP866483U Granted JPS59115653U (ja) 1983-01-25 1983-01-25 絶縁物封止半導体装置

Country Status (1)

Country Link
JP (1) JPS59115653U (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62188149U (enrdf_load_stackoverflow) * 1986-05-22 1987-11-30
JPS63155650U (enrdf_load_stackoverflow) * 1987-03-31 1988-10-12
EP2899754A3 (en) * 2014-01-27 2015-10-07 Samsung Electronics Co., Ltd Semiconductor device
JP2017059846A (ja) * 2016-11-24 2017-03-23 三菱電機株式会社 パワーモジュールの製造方法
WO2024203066A1 (ja) * 2023-03-28 2024-10-03 ローム株式会社 半導体装置および車両

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58209147A (ja) * 1982-05-31 1983-12-06 Toshiba Corp 樹脂封止型半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58209147A (ja) * 1982-05-31 1983-12-06 Toshiba Corp 樹脂封止型半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62188149U (enrdf_load_stackoverflow) * 1986-05-22 1987-11-30
JPS63155650U (enrdf_load_stackoverflow) * 1987-03-31 1988-10-12
EP2899754A3 (en) * 2014-01-27 2015-10-07 Samsung Electronics Co., Ltd Semiconductor device
US9711435B2 (en) 2014-01-27 2017-07-18 Samsung Electronics Co., Ltd. Semiconductor device
JP2017059846A (ja) * 2016-11-24 2017-03-23 三菱電機株式会社 パワーモジュールの製造方法
WO2024203066A1 (ja) * 2023-03-28 2024-10-03 ローム株式会社 半導体装置および車両

Also Published As

Publication number Publication date
JPS6322678Y2 (enrdf_load_stackoverflow) 1988-06-22

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